235 lines
6.3 KiB
C
235 lines
6.3 KiB
C
/***************************************************************************
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* Copyright (C) 2005 by Dominic Rath *
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* Dominic.Rath@gmx.de *
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* *
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* Copyright (C) 2006 by Magnus Lundin *
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* lundin@mlu.mine.nu *
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* *
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* Copyright (C) 2008 by Spencer Oliver *
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* spen@spen-soft.co.uk *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; either version 2 of the License, or *
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* (at your option) any later version. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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* *
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* You should have received a copy of the GNU General Public License *
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* along with this program; if not, write to the *
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* Free Software Foundation, Inc., *
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
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***************************************************************************/
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#ifndef ARMV7M_COMMON_H
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#define ARMV7M_COMMON_H
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#include "arm_adi_v5.h"
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#include "arm.h"
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#include "armv7m_trace.h"
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extern const int armv7m_psp_reg_map[];
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extern const int armv7m_msp_reg_map[];
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const char *armv7m_exception_string(int number);
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/* offsets into armv7m core register cache */
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enum {
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/* for convenience, the first set of indices match
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* the Cortex-M3/-M4 DCRSR selectors
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*/
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ARMV7M_R0,
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ARMV7M_R1,
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ARMV7M_R2,
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ARMV7M_R3,
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ARMV7M_R4,
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ARMV7M_R5,
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ARMV7M_R6,
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ARMV7M_R7,
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ARMV7M_R8,
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ARMV7M_R9,
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ARMV7M_R10,
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ARMV7M_R11,
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ARMV7M_R12,
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ARMV7M_R13,
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ARMV7M_R14,
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ARMV7M_PC = 15,
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ARMV7M_xPSR = 16,
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ARMV7M_MSP,
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ARMV7M_PSP,
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/* this next set of indices is arbitrary */
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ARMV7M_PRIMASK,
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ARMV7M_BASEPRI,
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ARMV7M_FAULTMASK,
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ARMV7M_CONTROL,
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/* 32bit Floating-point registers */
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ARMV7M_S0,
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ARMV7M_S1,
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ARMV7M_S2,
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ARMV7M_S3,
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ARMV7M_S4,
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ARMV7M_S5,
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ARMV7M_S6,
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ARMV7M_S7,
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ARMV7M_S8,
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ARMV7M_S9,
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ARMV7M_S10,
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ARMV7M_S11,
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ARMV7M_S12,
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ARMV7M_S13,
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ARMV7M_S14,
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ARMV7M_S15,
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ARMV7M_S16,
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ARMV7M_S17,
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ARMV7M_S18,
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ARMV7M_S19,
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ARMV7M_S20,
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ARMV7M_S21,
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ARMV7M_S22,
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ARMV7M_S23,
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ARMV7M_S24,
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ARMV7M_S25,
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ARMV7M_S26,
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ARMV7M_S27,
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ARMV7M_S28,
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ARMV7M_S29,
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ARMV7M_S30,
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ARMV7M_S31,
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/* 64bit Floating-point registers */
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ARMV7M_D0,
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ARMV7M_D1,
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ARMV7M_D2,
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ARMV7M_D3,
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ARMV7M_D4,
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ARMV7M_D5,
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ARMV7M_D6,
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ARMV7M_D7,
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ARMV7M_D8,
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ARMV7M_D9,
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ARMV7M_D10,
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ARMV7M_D11,
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ARMV7M_D12,
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ARMV7M_D13,
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ARMV7M_D14,
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ARMV7M_D15,
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/* Floating-point status registers */
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ARMV7M_FPSID,
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ARMV7M_FPSCR,
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ARMV7M_FPEXC,
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ARMV7M_LAST_REG,
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};
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enum {
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FP_NONE = 0,
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FPv4_SP,
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};
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#define ARMV7M_NUM_CORE_REGS (ARMV7M_xPSR + 1)
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#define ARMV7M_NUM_CORE_REGS_NOFP (ARMV7M_NUM_CORE_REGS + 6)
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#define ARMV7M_COMMON_MAGIC 0x2A452A45
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struct armv7m_common {
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struct arm arm;
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int common_magic;
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int exception_number;
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/* AP this processor is connected to in the DAP */
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struct adiv5_ap *debug_ap;
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int fp_feature;
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uint32_t demcr;
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/* stlink is a high level adapter, does not support all functions */
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bool stlink;
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struct armv7m_trace_config trace_config;
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/* Direct processor core register read and writes */
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int (*load_core_reg_u32)(struct target *target, uint32_t num, uint32_t *value);
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int (*store_core_reg_u32)(struct target *target, uint32_t num, uint32_t value);
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int (*examine_debug_reason)(struct target *target);
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int (*post_debug_entry)(struct target *target);
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void (*pre_restore_context)(struct target *target);
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};
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static inline struct armv7m_common *
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target_to_armv7m(struct target *target)
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{
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return container_of(target->arch_info, struct armv7m_common, arm);
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}
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static inline bool is_armv7m(struct armv7m_common *armv7m)
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{
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return armv7m->common_magic == ARMV7M_COMMON_MAGIC;
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}
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struct armv7m_algorithm {
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int common_magic;
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enum arm_mode core_mode;
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uint32_t context[ARMV7M_LAST_REG]; /* ARMV7M_NUM_REGS */
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};
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struct reg_cache *armv7m_build_reg_cache(struct target *target);
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void armv7m_free_reg_cache(struct target *target);
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enum armv7m_mode armv7m_number_to_mode(int number);
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int armv7m_mode_to_number(enum armv7m_mode mode);
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int armv7m_arch_state(struct target *target);
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int armv7m_get_gdb_reg_list(struct target *target,
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struct reg **reg_list[], int *reg_list_size,
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enum target_register_class reg_class);
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int armv7m_init_arch_info(struct target *target, struct armv7m_common *armv7m);
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int armv7m_run_algorithm(struct target *target,
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int num_mem_params, struct mem_param *mem_params,
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int num_reg_params, struct reg_param *reg_params,
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uint32_t entry_point, uint32_t exit_point,
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int timeout_ms, void *arch_info);
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int armv7m_start_algorithm(struct target *target,
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int num_mem_params, struct mem_param *mem_params,
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int num_reg_params, struct reg_param *reg_params,
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uint32_t entry_point, uint32_t exit_point,
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void *arch_info);
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int armv7m_wait_algorithm(struct target *target,
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int num_mem_params, struct mem_param *mem_params,
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int num_reg_params, struct reg_param *reg_params,
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uint32_t exit_point, int timeout_ms,
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void *arch_info);
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int armv7m_invalidate_core_regs(struct target *target);
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int armv7m_restore_context(struct target *target);
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int armv7m_checksum_memory(struct target *target,
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uint32_t address, uint32_t count, uint32_t *checksum);
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int armv7m_blank_check_memory(struct target *target,
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uint32_t address, uint32_t count, uint32_t *blank);
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int armv7m_maybe_skip_bkpt_inst(struct target *target, bool *inst_found);
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extern const struct command_registration armv7m_command_handlers[];
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#endif /* ARMV7M_H */
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