4e31b87943
Change-Id: Idf98526d64dcba4d8a5b6910bd3c539756753e8e Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/539 Tested-by: jenkins
41 lines
1.0 KiB
INI
41 lines
1.0 KiB
INI
################################################################################
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# Author: Michael Trensch (MTrensch@googlemail.com)
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################################################################################
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source [find target/hilscher_netx500.cfg]
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reset_config trst_and_srst
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adapter_nsrst_delay 500
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jtag_ntrst_delay 500
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$_TARGETNAME configure -work-area-virt 0x1000 -work-area-phys 0x1000 -work-area-size 0x4000 -work-area-backup 1
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$_TARGETNAME configure -event reset-init {
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halt
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arm7_9 fast_memory_access enable
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arm7_9 dcc_downloads disable
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sdram_fix
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puts "Configuring SDRAM controller for MT48LC8M32 (32MB) "
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mww 0x00100140 0
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mww 0x00100144 0x03C23251
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mww 0x00100140 0x030D0111
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puts "Configuring SRAM nCS0 for 150ns Par. Flash (x16)"
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mww 0x00100100 0x0101000E
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flash probe 0
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}
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#####################
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# Flash configuration
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#####################
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#flash bank <name> <driver> <base> <size> <chip width> <bus width> <target#>
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flash bank parflash cfi 0xC0000000 0x01000000 2 2 $_TARGETNAME
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init
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reset init
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