73 lines
1.9 KiB
INI
73 lines
1.9 KiB
INI
#STR750 CPU
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME str750
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}
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if { [info exists ENDIAN] } {
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set _ENDIAN $ENDIAN
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} else {
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set _ENDIAN little
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}
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if { [info exists CPUTAPID] } {
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set _CPUTAPID $CPUTAPID
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} else {
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set _CPUTAPID 0x4f1f0041
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}
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# jtag speed
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adapter_khz 10
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#use combined on interfaces or targets that can't set TRST/SRST separately
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reset_config trst_and_srst srst_pulls_trst
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#jtag scan chain
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0x0f -expected-id $_CPUTAPID
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#jtag nTRST and nSRST delay
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adapter_nsrst_delay 500
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jtag_ntrst_delay 500
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME arm7tdmi -endian little -chain-position 0
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$_TARGETNAME configure -event reset-start { adapter_khz 10 }
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$_TARGETNAME configure -event reset-init {
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adapter_khz 3000
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init_smi
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# Because the hardware cannot be interrogated for the protection state
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# of sectors, initialize all the sectors to be unprotected. The initial
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# state is reflected by the driver, too.
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flash protect 0 0 last off
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flash protect 1 0 last off
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}
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$_TARGETNAME configure -event gdb-flash-erase-start {
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flash protect 0 0 7 off
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flash protect 1 0 1 off
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}
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$_TARGETNAME configure -work-area-phys 0x40000000 -work-area-size 0x4000 -work-area-backup 0
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#flash bank <driver> <base> <size> <chip_width> <bus_width>
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set _FLASHNAME $_CHIPNAME.flash0
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flash bank $_FLASHNAME str7x 0x20000000 0x00040000 0 0 $_TARGETNAME STR75x
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set _FLASHNAME $_CHIPNAME.flash1
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flash bank $_FLASHNAME str7x 0x200C0000 0x00004000 0 0 $_TARGETNAME STR75x
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# Serial NOR on SMI CS0.
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set _FLASHNAME $_CHIPNAME.snor
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flash bank $_FLASHNAME stmsmi 0x80000000 0 0 0 $_TARGETNAME
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source [find mem_helper.tcl]
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proc init_smi {} {
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mmw 0x60000030 0x01000000 0x00000000; # enable clock for GPIO regs
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mmw 0xffffe420 0x00000001 0x00000000; # set SMI_EN bit
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mmw 0x90000000 0x00000001 0x00000000; # set BLOCK_EN_1
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}
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