f2b4897773
The device has compatible flash macro with STM32F1 family, reuse stm32f1x driver code. Detect non-ARM target - for simplicy test target type name 'riscv' and the address has 32 bits. In case of RISC-V CPU use simple chunked write algo - async algo cannot be used as the core implemented in this device doesn't allow memory access while running. Change-Id: Ie3886fbd8573652691f91a02335812a7300689f7 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: https://review.openocd.org/c/openocd/+/6704 Tested-by: jenkins Reviewed-by: Tim Newsome <tim@sifive.com> |
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.. | ||
flash | ||
helper | ||
jtag | ||
pld | ||
rtos | ||
rtt | ||
server | ||
svf | ||
target | ||
transport | ||
xsvf | ||
hello.c | ||
hello.h | ||
main.c | ||
Makefile.am | ||
openocd.c | ||
openocd.h |