openocd/tcl/target/lpc4350.cfg
Spencer Oliver 2ce4e31bbc cfg: update for target's that support cortex_m AIRCR SYSRESETREQ
If the target supports SYSRESETREQ make sure we use that as the default
if srst is not fitted/configured.

Change-Id: I24c907493134506320e69c1218702930629c1cdc
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/792
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-08-29 06:24:36 +00:00

49 lines
943 B
INI

adapter_khz 500
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME lpc4350
}
#
# M4 JTAG mode TAP
#
if { [info exists M4_JTAG_TAPID] } {
set _M4_JTAG_TAPID $M4_JTAG_TAPID
} else {
set _M4_JTAG_TAPID 0x4ba00477
}
#
# M4 SWD mode TAP
#
if { [info exists M4_SWD_TAPID] } {
set _M4_SWD_TAPID $M4_SWD_TAPID
} else {
set _M4_SWD_TAPID 0x2ba01477
}
#
# M0 TAP
#
if { [info exists M0_JTAG_TAPID] } {
set _M0_JTAG_TAPID $M0_JTAG_TAPID
} else {
set _M0_JTAG_TAPID 0x0ba01477
}
jtag newtap $_CHIPNAME m4 -irlen 4 -ircapture 0x1 -irmask 0xf \
-expected-id $_M4_JTAG_TAPID
jtag newtap $_CHIPNAME m0 -irlen 4 -ircapture 0x1 -irmask 0xf \
-expected-id $_M0_JTAG_TAPID
target create $_CHIPNAME.m4 cortex_m3 -chain-position $_CHIPNAME.m4
target create $_CHIPNAME.m0 cortex_m3 -chain-position $_CHIPNAME.m0
# if srst is not fitted use SYSRESETREQ to
# perform a soft reset
cortex_m3 reset_config sysresetreq