e6505b0489
For historical reasons, no license information was added to the
tcl files. This makes trivial adding the SPDX tag through script:
fgrep -rL SPDX tcl/ target| while read a;do \
sed -i '1{i# SPDX-License-Identifier: GPL-2.0-or-later\n
}' $a;done
With no specific license information from the author, let's extend
the OpenOCD project license GPL-2.0-or-later to the files.
Change-Id: I7b2610300b24cccd07bfa6fb5f1266970d5d3a1b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7027
Tested-by: jenkins
30 lines
1.0 KiB
INI
30 lines
1.0 KiB
INI
# SPDX-License-Identifier: GPL-2.0-or-later
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# script for ATMEL sam4l, a Cortex-M4 chip
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#
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source [find target/at91sam4XXX.cfg]
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set _FLASHNAME $_CHIPNAME.flash
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flash bank $_FLASHNAME at91sam4l 0x00000000 0 1 1 $_TARGETNAME
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# SAM4L SMAP will hold the CPU in reset if TCK is low when RESET_N
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# deasserts (see datasheet 42023E-SAM-07/2013 sec 8.11.3).
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#
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# smap_reset_deassert configures whether we want to run or halt out of reset,
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# then instruct the SMAP to let us out of reset.
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$_TARGETNAME configure -event reset-deassert-post "at91sam4l smap_reset_deassert"
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# SRST (wired to RESET_N) resets debug circuitry
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# srst_pulls_trst is not configured here to avoid an error raised in reset halt
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reset_config srst_gates_jtag
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# SAM4L starts from POR with SYSCLK set to 115kHz RCSYS, needs slow JTAG speed.
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# Datasheet does not specify SYSCLK to JTAG/SWD clock ratio.
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# Usually used SYSCLK/6 is hell slow, testing shows that debugging can work @ SYSCLK/2
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# but your mileage may vary.
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adapter speed 50
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# System RC oscillator RCSYS starts in 3 cycles
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adapter srst delay 0
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