e6505b0489
For historical reasons, no license information was added to the
tcl files. This makes trivial adding the SPDX tag through script:
fgrep -rL SPDX tcl/ target| while read a;do \
sed -i '1{i# SPDX-License-Identifier: GPL-2.0-or-later\n
}' $a;done
With no specific license information from the author, let's extend
the OpenOCD project license GPL-2.0-or-later to the files.
Change-Id: I7b2610300b24cccd07bfa6fb5f1266970d5d3a1b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7027
Tested-by: jenkins
64 lines
1.6 KiB
INI
64 lines
1.6 KiB
INI
# SPDX-License-Identifier: GPL-2.0-or-later
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#
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# script for Nordic nRF51 series, a Cortex-M0 chip
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#
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source [find target/swj-dp.tcl]
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME nrf51
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}
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if { [info exists ENDIAN] } {
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set _ENDIAN $ENDIAN
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} else {
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set _ENDIAN little
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}
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# Work-area is a space in RAM used for flash programming
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# By default use 16kB
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if { [info exists WORKAREASIZE] } {
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set _WORKAREASIZE $WORKAREASIZE
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} else {
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set _WORKAREASIZE 0x4000
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}
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if { [info exists CPUTAPID] } {
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set _CPUTAPID $CPUTAPID
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} else {
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set _CPUTAPID 0x0bb11477
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}
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swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID
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dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap
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$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
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if {![using_hla]} {
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# The chip supports standard ARM/Cortex-M0 SYSRESETREQ signal
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cortex_m reset_config sysresetreq
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}
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flash bank $_CHIPNAME.flash nrf51 0x00000000 0 1 1 $_TARGETNAME
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flash bank $_CHIPNAME.uicr nrf51 0x10001000 0 1 1 $_TARGETNAME
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#
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# The chip should start up from internal 16Mhz RC, so setting adapter
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# clock to 1Mhz should be OK
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#
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adapter speed 1000
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proc enable_all_ram {} {
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# nRF51822 Product Anomaly Notice (PAN) #16 explains that not all RAM banks
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# are reliably enabled after reset on some revisions (contrary to spec.) So after
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# resetting we enable all banks via the RAMON register
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mww 0x40000524 0xF
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}
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$_TARGETNAME configure -event reset-end { enable_all_ram }
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