f998a2aaf1
Change-Id: I1bc105b3addc3f34161c2356c482ff3011e3f2cc Signed-off-by: Jacek Wuwer <jacekmw8@gmail.com> Reviewed-on: https://review.openocd.org/c/openocd/+/6097 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de> Reviewed-by: zapb <dev@zapb.de> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
33 lines
853 B
INI
33 lines
853 B
INI
# SPDX-License-Identifier: GPL-2.0-or-later
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# Cadence virtual debug interface
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# RISCV swerv core with Swerv through JTAG
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source [find interface/vdebug.cfg]
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set _CHIPNAME rv32
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set _HARTID 0x00
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set _CPUTAPID 0x1000008b
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set _MEMSTART 0x00000000
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set _MEMSIZE 0x10000
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# vdebug select transport
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#transport select jtag
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# JTAG reset config, frequency and reset delay
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reset_config trst_and_srst
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adapter speed 50000
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adapter srst delay 5
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# BFM hierarchical path and input clk period
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vdebug bfm_path tbench.u_vd_jtag_bfm 10ns
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# DMA Memories to access backdoor (up to 4)
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vdebug mem_path tbench.i_ahb_ic.mem $_MEMSTART $_MEMSIZE
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# need to explicitly define riscv tap, autoprobing does not work for icapture != 0x01
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jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x01 -irmask 0x1f -expected-id $_CPUTAPID
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jtag arp_init-reset
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source [find target/vd_riscv.cfg]
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