4157732bd8
For historical reasons, no license information was added to the
tcl files. This makes trivial adding the SPDX tag through script:
fgrep -rL SPDX tcl/board | while read a;do \
sed -i '1{i# SPDX-License-Identifier: GPL-2.0-or-later\n
}' $a;done
With no specific license information from the author, let's extend
the OpenOCD project license GPL-2.0-or-later to the files.
Change-Id: Ibcf7da62e842aafd036a78db9ea2b9f11f79af16
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7028
Tested-by: jenkins
Reviewed-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
78 lines
1.9 KiB
INI
78 lines
1.9 KiB
INI
# SPDX-License-Identifier: GPL-2.0-or-later
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# Keil MCB1700 PCB with 1768
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#
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# Reset init script sets it to 100MHz
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set CCLK 100000
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source [find target/lpc17xx.cfg]
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global MCB1700_CCLK
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set MCB1700_CCLK $CCLK
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$_TARGETNAME configure -event reset-start {
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# Start *real slow* as we do not know the
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# state the boot rom left the clock in
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adapter speed 10
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}
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# Set up 100MHz clock to CPU
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$_TARGETNAME configure -event reset-init {
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# PLL0CON: Disable PLL
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mww 0x400FC080 0x00000000
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# PLLFEED
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mww 0x400FC08C 0x000000AA
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# PLLFEED
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mww 0x400FC08C 0x00000055
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# CCLK=PLL/4 (=100 MHz)
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mww 0x400FC104 0x00000003
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# CLKSRCSEL: Clock source = internal RC oscillator
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mww 0x400FC10C 0x00000000
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# PLL0CFG: M=50,N=1 -> PLL=400 MHz
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mww 0x400FC084 0x00000031
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# PLLFEED
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mww 0x400FC08C 0x000000AA
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# PLLFEED
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mww 0x400FC08C 0x00000055
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# PLL0CON: Enable PLL
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mww 0x400FC080 0x00000001
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# PLLFEED
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mww 0x400FC08C 0x000000AA
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# PLLFEED
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mww 0x400FC08C 0x00000055
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sleep 50
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# PLL0CON: Connect PLL
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mww 0x400FC080 0x00000003
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# PLLFEED
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mww 0x400FC08C 0x000000AA
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# PLLFEED
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mww 0x400FC08C 0x00000055
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# Dividing CPU clock by 8 should be pretty conservative
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#
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#
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global MCB1700_CCLK
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adapter speed [expr {$MCB1700_CCLK / 8}]
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# Do not remap 0x0000-0x0020 to anything but the flash (i.e. select
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# "User Flash Mode" where interrupt vectors are _not_ remapped,
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# and reside in flash instead).
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#
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# See Table 612. Memory Mapping Control register (MEMMAP - 0x400F C040) bit description
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# Bit Symbol Value Description Reset
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# value
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# 0 MAP Memory map control. 0
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# 0 Boot mode. A portion of the Boot ROM is mapped to address 0.
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# 1 User mode. The on-chip Flash memory is mapped to address 0.
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# 31:1 - Reserved. The value read from a reserved bit is not defined. NA
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#
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# http://ics.nxp.com/support/documents/microcontrollers/?scope=LPC1768&type=user
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mww 0x400FC040 0x01
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}
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