77287b8d47
ESP32 is a dual core Xtensa SoC Not full featured yet. Some of the missing functionality: -Semihosting -Flash breakpoints -Flash loader -Apptrace -FreeRTOS Signed-off-by: Erhan Kurubas <erhan.kurubas@espressif.com> Change-Id: I76fb184aa38ab9f4e30290c038b5ff8850060750 Reviewed-on: https://review.openocd.org/c/openocd/+/6989 Tested-by: jenkins Reviewed-by: Ian Thompson <ianst@cadence.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
26 lines
738 B
INI
26 lines
738 B
INI
# SPDX-License-Identifier: GPL-2.0-or-later
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#
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# Driver for the FT2232H JTAG chip on the Espressif DevkitJ board
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# (and most other FT2232H and FT232H based boards)
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#
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adapter driver ftdi
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ftdi vid_pid 0x0403 0x6010 0x0403 0x6014
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# interface 1 is the uart
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ftdi channel 0
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# TCK, TDI, TDO, TMS: ADBUS0-3
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# LEDs: ACBUS4-7
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ftdi layout_init 0x0008 0xf00b
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ftdi layout_signal LED -data 0x1000
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ftdi layout_signal LED2 -data 0x2000
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ftdi layout_signal LED3 -data 0x4000
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ftdi layout_signal LED4 -data 0x8000
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# ESP32 series chips do not have a TRST input, and the SRST line is connected to the EN pin.
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# The target code doesn't handle SRST reset properly yet, so this is commented out:
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# ftdi_layout_signal nSRST -oe 0x0020
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# reset_config srst_only
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