e6505b0489
For historical reasons, no license information was added to the
tcl files. This makes trivial adding the SPDX tag through script:
fgrep -rL SPDX tcl/ target| while read a;do \
sed -i '1{i# SPDX-License-Identifier: GPL-2.0-or-later\n
}' $a;done
With no specific license information from the author, let's extend
the OpenOCD project license GPL-2.0-or-later to the files.
Change-Id: I7b2610300b24cccd07bfa6fb5f1266970d5d3a1b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7027
Tested-by: jenkins
55 lines
1.5 KiB
INI
55 lines
1.5 KiB
INI
# SPDX-License-Identifier: GPL-2.0-or-later
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#
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# Analog Devices ADSP-SC58x (ARM Cortex-A5 plus one or two SHARC+ DSPs)
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#
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# Evaluation boards by Analog Devices (and designs derived from them) use a
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# non-standard 10-pin 0.05" ARM Cortex Debug Connector. In this bastardized
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# implementation, pin 9 (GND or GNDDetect) has been usurped with JTAG /TRST.
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#
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# As a result, a standards-compliant debug pod will force /TRST active,
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# putting the processor's debug interface into reset and preventing usage.
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#
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# A connector adapter must be employed on these boards to isolate or remap
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# /TRST so that it is only asserted when intended.
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source [find target/swj-dp.tcl]
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME ADSP-SC58x
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}
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if { [info exists ENDIAN] } {
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set _ENDIAN $ENDIAN
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} else {
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set _ENDIAN little
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}
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if { [info exists CPUTAPID] } {
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set _CPUTAPID $CPUTAPID
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} else {
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set _CPUTAPID 0x3BA02477
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}
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swj_newdap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
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dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
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target create ap0.mem mem_ap -dap $_CHIPNAME.dap -ap-num 0
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME cortex_a -endian $_ENDIAN -dap $_CHIPNAME.dap
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$_TARGETNAME configure -event examine-end {
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global _TARGETNAME
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sc58x_enabledebug
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}
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proc sc58x_enabledebug {} {
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# Enable debugging functionality by setting bits in the TAPC_DBGCTL register
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# it is not possible to halt the target unless these bits have been set
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ap0.mem mww 0x31131000 0xFFFF
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}
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