openocd/tcl/cpld/altera-epm240.cfg
Sean Anderson b61eae1962 cpld: altera-epm240: Increase adapter speed
According to the datasheet, the minimum clock period with Vccio1 = 1.5V
(the lowest voltage supported) is 143ns, or around 6MHz. Set the default
adapter speed to 5 MHz.

Signed-off-by: Sean Anderson <sean.anderson@seco.com>
Change-Id: I21cad33fa7f1e25e81f43b5d2214d1fa4ec924de
Reviewed-on: https://review.openocd.org/c/openocd/+/6847
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2022-02-26 15:29:52 +00:00

24 lines
610 B
INI

# Altera MAXII EPM240T100C CPLD
if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME epm240
}
# see MAX II Device Handbook
# Table 3-3: 32-Bit MAX II Device IDCODE
# Version Part Number Manuf. ID LSB
# 0000 0010 0000 1010 0001 000 0110 1110 1
jtag newtap $_CHIPNAME tap -irlen 10 \
-expected-id 0x020a10dd \
-expected-id 0x020a20dd \
-expected-id 0x020a30dd \
-expected-id 0x020a40dd \
-expected-id 0x020a50dd \
-expected-id 0x020a60dd
# 200ns seems like a good speed
# c.f. Table 5-34: MAX II JTAG Timing Parameters
adapter speed 5000