1c07229f8c
The flash is compatible with stm32f1x, reuse the driver. Extend the size of work area to RAM size of the smallest device. Stop watchdogs before flash programming. Change-Id: I67a7654a6e196f9d4b2409edaa7990c53334437e Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: https://review.openocd.org/c/openocd/+/6711 Tested-by: jenkins Reviewed-by: Tim Newsome <tim@sifive.com>
41 lines
1.0 KiB
INI
41 lines
1.0 KiB
INI
#
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# GigaDevice GD32VF103 target
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#
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# https://www.gigadevice.com/products/microcontrollers/gd32/risc-v/
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#
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source [find mem_helper.tcl]
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transport select jtag
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME gd32vf103
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}
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# The smallest RAM size 6kB (GD32VF103C4/T4/R4)
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if { [info exists WORKAREASIZE] } {
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set _WORKAREASIZE $WORKAREASIZE
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} else {
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set _WORKAREASIZE 0x1800
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}
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jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x1000563d
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME riscv -chain-position $_TARGETNAME
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$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
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set _FLASHNAME $_CHIPNAME.flash
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flash bank $_FLASHNAME stm32f1x 0x08000000 0 0 0 $_TARGETNAME
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# DBGMCU_CR register cannot be set in examine-end event as the running RISC-V CPU
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# does not allow the debugger to access memory.
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# Stop watchdogs at least before flash programming.
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$_TARGETNAME configure -event reset-init {
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# DBGMCU_CR |= DBG_WWDG_STOP | DBG_IWDG_STOP
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mmw 0xE0042004 0x00000300 0
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}
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