a38a0afd17
On SMP Renesas R-Car Gen2/Gen3 systems, select the boot core as the default target using the 'targets' command. This way, the user can start debugging code running on the boot core without having to switch to the boot core by explicitly invoking 'targets' command first, since it is likely the debugged code will run on the boot core. Note that most of the code is already in place, it was just not used, so this is more of a fix to make the original intention work. Change-Id: I727808adce617c1d9ebd6ffa34f60f5882cdae60 Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Reviewed-on: http://openocd.zylin.com/6313 Tested-by: jenkins Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
129 lines
3.0 KiB
INI
129 lines
3.0 KiB
INI
# Renesas R-Car Generation 2 SOCs
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# - There are a combination of Cortex-A15s and Cortex-A7s for each Gen2 SOC
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# - Each SOC can boot through any of the, up to 2, core types that it has
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# e.g. H2 can boot through Cortex-A15 or Cortex-A7
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# Supported Gen2 SOCs and their cores:
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# H2: Cortex-A15 x 4, Cortex-A7 x 4
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# M2: Cortex-A15 x 2
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# V2H: Cortex-A15 x 2
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# M2N: Cortex-A15 x 2
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# E2: Cortex-A7 x 2
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# Usage:
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# There are 2 configuration options:
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# SOC: Selects the supported SOC. (Default 'H2')
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# BOOT_CORE: Selects the booting core. 'CA15', or 'CA7'
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# Defaults to 'CA15' if the SOC has one, else defaults to 'CA7'
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if { [info exists SOC] } {
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set _soc $SOC
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} else {
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set _soc H2
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}
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# Set configuration for each SOC and the default 'BOOT_CORE'
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switch $_soc {
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H2 {
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set _CHIPNAME r8a7790
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set _num_ca15 4
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set _num_ca7 4
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set _boot_core CA15
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}
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M2 {
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set _CHIPNAME r8a7791
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set _num_ca15 2
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set _num_ca7 0
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set _boot_core CA15
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}
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V2H {
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set _CHIPNAME r8a7792
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set _num_ca15 2
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set _num_ca7 0
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set _boot_core CA15
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}
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M2N {
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set _CHIPNAME r8a7793
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set _num_ca15 2
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set _num_ca7 0
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set _boot_core CA15
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}
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E2 {
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set _CHIPNAME r8a7794
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set _num_ca15 0
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set _num_ca7 2
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set _boot_core CA7
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}
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default {
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error "'$_soc' is invalid!"
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}
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}
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# If configured, override the default 'CHIPNAME'
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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}
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# If configured, override the default 'BOOT_CORE'
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if { [info exists BOOT_CORE] } {
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set _boot_core $BOOT_CORE
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}
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if { [info exists DAP_TAPID] } {
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set _DAP_TAPID $DAP_TAPID
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} else {
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set _DAP_TAPID 0x4ba00477
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}
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echo "\t$_soc - $_num_ca15 CA15(s), $_num_ca7 CA7(s)"
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echo "\tBoot Core - $_boot_core\n"
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set _DAPNAME $_CHIPNAME.dap
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# TAP and DAP
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x01 -irmask 0x0f -expected-id $_DAP_TAPID
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dap create $_DAPNAME -chain-position $_CHIPNAME.cpu
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set CA15_DBGBASE {0x800B0000 0x800B2000 0x800B4000 0x800B6000}
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set CA7_DBGBASE {0x800F0000 0x800F2000 0x800F4000 0x800F6000}
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set _targets ""
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set smp_targets ""
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proc setup_ca {core_name dbgbase num boot} {
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global _CHIPNAME
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global _DAPNAME
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global smp_targets
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global _targets
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for { set _core 0 } { $_core < $num } { incr _core } {
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set _TARGETNAME $_CHIPNAME.$core_name.$_core
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set _CTINAME $_TARGETNAME.cti
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set _command "target create $_TARGETNAME cortex_a -dap $_DAPNAME \
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-coreid $_core -dbgbase [lindex $dbgbase $_core]"
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if { $_core == 0 && $boot == 1 } {
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set _targets "$_TARGETNAME"
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} else {
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set _command "$_command -defer-examine"
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}
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set smp_targets "$smp_targets $_TARGETNAME"
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eval $_command
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}
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}
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# Organize target list based on the boot core
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if { [string equal $_boot_core CA15] } {
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setup_ca a15 $CA15_DBGBASE $_num_ca15 1
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setup_ca a7 $CA7_DBGBASE $_num_ca7 0
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} elseif { [string equal $_boot_core CA7] } {
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setup_ca a7 $CA7_DBGBASE $_num_ca7 1
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setup_ca a15 $CA15_DBGBASE $_num_ca15 0
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} else {
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setup_ca a15 $CA15_DBGBASE $_num_ca15 0
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setup_ca a7 $CA7_DBGBASE $_num_ca7 0
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}
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source [find target/renesas_rcar_reset_common.cfg]
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eval "target smp $smp_targets"
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targets $_targets
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