7ccc511088
Pull the jtag_rtck setting from imx51.cfg and imx53.cfg . Since not all boards using these CPUs do support RTCK signal, move the configuration of RTCK into board files. Change-Id: I632c5d38e00ada8779a451cd26428fd122452001 Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Reviewed-on: http://openocd.zylin.com/1460 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
48 lines
1.2 KiB
INI
48 lines
1.2 KiB
INI
# Freescale i.MX53
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME imx53
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}
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# CoreSight Debug Access Port
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if { [info exists DAP_TAPID] } {
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set _DAP_TAPID $DAP_TAPID
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} else {
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set _DAP_TAPID 0x1ba00477
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}
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jtag newtap $_CHIPNAME DAP -irlen 4 -ircapture 0x1 -irmask 0xf \
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-expected-id $_DAP_TAPID
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# SDMA / no IDCODE
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jtag newtap $_CHIPNAME SDMA -irlen 4 -ircapture 0x0 -irmask 0xf
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# SJC
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if { [info exists SJC_TAPID] } {
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set _SJC_TAPID SJC_TAPID
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} else {
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set _SJC_TAPID 0x0190d01d
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}
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jtag newtap $_CHIPNAME SJC -irlen 5 -ircapture 0x1 -irmask 0x1f \
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-expected-id $_SJC_TAPID -ignore-version
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# GDB target: Cortex-A8, using DAP
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME cortex_a -chain-position $_CHIPNAME.DAP
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# some TCK tycles are required to activate the DEBUG power domain
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jtag configure $_CHIPNAME.SJC -event post-reset "runtest 100"
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# have the DAP "always" be active
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jtag configure $_CHIPNAME.SJC -event setup "jtag tapenable $_CHIPNAME.DAP"
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proc imx53_dbginit {target} {
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# General Cortex A8 debug initialisation
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cortex_a dbginit
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}
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$_TARGETNAME configure -event reset-assert-post "imx53_dbginit $_TARGETNAME"
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