55eeea7fce
Save and display the address of the instruction which triggered the watchpoint. Because of pipelining, that's well behind the PC value when debug entry completes. (Example in a subroutine that had been returned from...) Remove unused A8 stuff, mostly watchpoint hooks from the header. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
228 lines
6.6 KiB
C
228 lines
6.6 KiB
C
/***************************************************************************
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* Copyright (C) 2009 by David Brownell *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; either version 2 of the License, or *
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* (at your option) any later version. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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* *
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* You should have received a copy of the GNU General Public License *
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* along with this program; if not, write to the *
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* Free Software Foundation, Inc., *
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* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
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***************************************************************************/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include "replacements.h"
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#include "armv7a.h"
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#include "arm_disassembler.h"
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#include "register.h"
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#include "binarybuffer.h"
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#include "command.h"
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#include <stdlib.h>
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#include <string.h>
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#include <unistd.h>
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static void armv7a_show_fault_registers(struct target *target)
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{
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uint32_t dfsr, ifsr, dfar, ifar;
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struct armv7a_common *armv7a = target_to_armv7a(target);
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struct arm_dpm *dpm = armv7a->armv4_5_common.dpm;
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int retval;
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retval = dpm->prepare(dpm);
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if (retval != ERROR_OK)
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return;
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/* ARMV4_5_MRC(cpnum, op1, r0, CRn, CRm, op2) */
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/* c5/c0 - {data, instruction} fault status registers */
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retval = dpm->instr_read_data_r0(dpm,
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ARMV4_5_MRC(15, 0, 0, 5, 0, 0),
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&dfsr);
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if (retval != ERROR_OK)
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goto done;
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retval = dpm->instr_read_data_r0(dpm,
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ARMV4_5_MRC(15, 0, 0, 5, 0, 1),
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&ifsr);
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if (retval != ERROR_OK)
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goto done;
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/* c6/c0 - {data, instruction} fault address registers */
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retval = dpm->instr_read_data_r0(dpm,
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ARMV4_5_MRC(15, 0, 0, 6, 0, 0),
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&dfar);
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if (retval != ERROR_OK)
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goto done;
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retval = dpm->instr_read_data_r0(dpm,
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ARMV4_5_MRC(15, 0, 0, 6, 0, 2),
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&ifar);
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if (retval != ERROR_OK)
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goto done;
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LOG_USER("Data fault registers DFSR: %8.8" PRIx32
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", DFAR: %8.8" PRIx32, dfsr, dfar);
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LOG_USER("Instruction fault registers IFSR: %8.8" PRIx32
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", IFAR: %8.8" PRIx32, ifsr, ifar);
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done:
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/* (void) */ dpm->finish(dpm);
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}
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int armv7a_arch_state(struct target *target)
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{
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static const char *state[] =
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{
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"disabled", "enabled"
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};
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struct armv7a_common *armv7a = target_to_armv7a(target);
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struct arm *armv4_5 = &armv7a->armv4_5_common;
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if (armv7a->common_magic != ARMV7_COMMON_MAGIC)
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{
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LOG_ERROR("BUG: called for a non-ARMv7A target");
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return ERROR_INVALID_ARGUMENTS;
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}
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LOG_USER("target halted in %s state due to %s, current mode: %s\n"
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"cpsr: 0x%8.8" PRIx32 " pc: 0x%8.8" PRIx32 "\n"
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"MMU: %s, D-Cache: %s, I-Cache: %s",
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armv4_5_state_strings[armv4_5->core_state],
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Jim_Nvp_value2name_simple(nvp_target_debug_reason,
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target->debug_reason)->name,
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arm_mode_name(armv4_5->core_mode),
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buf_get_u32(armv4_5->cpsr->value, 0, 32),
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buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32),
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state[armv7a->armv4_5_mmu.mmu_enabled],
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state[armv7a->armv4_5_mmu.armv4_5_cache.d_u_cache_enabled],
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state[armv7a->armv4_5_mmu.armv4_5_cache.i_cache_enabled]);
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if (armv4_5->core_mode == ARMV4_5_MODE_ABT)
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armv7a_show_fault_registers(target);
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else if (target->debug_reason == DBG_REASON_WATCHPOINT)
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LOG_USER("Watchpoint triggered at PC %#08x",
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(unsigned) armv7a->dpm.wp_pc);
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return ERROR_OK;
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}
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COMMAND_HANDLER(handle_dap_baseaddr_command)
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{
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struct target *target = get_current_target(CMD_CTX);
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struct armv7a_common *armv7a = target_to_armv7a(target);
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struct swjdp_common *swjdp = &armv7a->swjdp_info;
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return CALL_COMMAND_HANDLER(dap_baseaddr_command, swjdp);
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}
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COMMAND_HANDLER(handle_dap_memaccess_command)
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{
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struct target *target = get_current_target(CMD_CTX);
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struct armv7a_common *armv7a = target_to_armv7a(target);
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struct swjdp_common *swjdp = &armv7a->swjdp_info;
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return CALL_COMMAND_HANDLER(dap_memaccess_command, swjdp);
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}
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COMMAND_HANDLER(handle_dap_apsel_command)
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{
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struct target *target = get_current_target(CMD_CTX);
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struct armv7a_common *armv7a = target_to_armv7a(target);
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struct swjdp_common *swjdp = &armv7a->swjdp_info;
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return CALL_COMMAND_HANDLER(dap_apsel_command, swjdp);
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}
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COMMAND_HANDLER(handle_dap_apid_command)
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{
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struct target *target = get_current_target(CMD_CTX);
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struct armv7a_common *armv7a = target_to_armv7a(target);
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struct swjdp_common *swjdp = &armv7a->swjdp_info;
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return CALL_COMMAND_HANDLER(dap_apid_command, swjdp);
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}
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COMMAND_HANDLER(handle_dap_info_command)
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{
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struct target *target = get_current_target(CMD_CTX);
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struct armv7a_common *armv7a = target_to_armv7a(target);
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struct swjdp_common *swjdp = &armv7a->swjdp_info;
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uint32_t apsel;
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switch (CMD_ARGC) {
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case 0:
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apsel = swjdp->apsel;
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break;
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case 1:
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COMMAND_PARSE_NUMBER(u32, CMD_ARGV[0], apsel);
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break;
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default:
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return ERROR_COMMAND_SYNTAX_ERROR;
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}
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return dap_info_command(CMD_CTX, swjdp, apsel);
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}
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static const struct command_registration armv7a_exec_command_handlers[] = {
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{
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.name = "info",
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.handler = &handle_dap_info_command,
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.mode = COMMAND_EXEC,
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.help = "dap info for ap [num], "
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"default currently selected AP",
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},
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{
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.name = "apsel",
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.handler = &handle_dap_apsel_command,
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.mode = COMMAND_EXEC,
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.help = "select a different AP [num] (default 0)",
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},
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{
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.name = "apid",
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.handler = &handle_dap_apid_command,
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.mode = COMMAND_EXEC,
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.help = "return id reg from AP [num], "
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"default currently selected AP",
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},
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{
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.name = "baseaddr",
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.handler = &handle_dap_baseaddr_command,
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.mode = COMMAND_EXEC,
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.help = "return debug base address from AP [num], "
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"default currently selected AP",
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},
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{
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.name = "memaccess",
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.handler = &handle_dap_memaccess_command,
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.mode = COMMAND_EXEC,
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.help = "set/get number of extra tck for mem-ap memory "
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"bus access [0-255]",
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},
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COMMAND_REGISTRATION_DONE
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};
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const struct command_registration armv7a_command_handlers[] = {
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{
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.name = "dap",
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.mode = COMMAND_ANY,
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.help = "Cortex DAP command group",
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.chain = armv7a_exec_command_handlers,
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},
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COMMAND_REGISTRATION_DONE
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};
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