5c035e322f
configuration also contains a reset-init procedure that disables the watchdog and initilizes the boards DDR memory so that you can upload baremetal (e.g. boot loader) code into DDR and start it from there. Change-Id: I4d2311b3708a5fcb5174a3447f34ae3904de7243 Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/4227 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de> |
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.. | ||
board | ||
chip | ||
cpld | ||
cpu/arm | ||
fpga | ||
interface | ||
target | ||
test | ||
tools | ||
bitsbytes.tcl | ||
mem_helper.tcl | ||
memory.tcl | ||
mmr_helpers.tcl |