5c2f920cc7
The only remaining user is arm7_9 so remove it from the target API and add it to struct arm7_9_common to support all its variants with minimal changes. Many of the variants are likely not correct in the cache/mmu handling when the bulk write is triggered. This patch does nothing to change that, except for arm946e, where it was easier to do what might be the right thing. Change-Id: Ie73ac07507ff0936fefdb90760046cc8810ed182 Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/1220 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
76 lines
3.0 KiB
C
76 lines
3.0 KiB
C
/***************************************************************************
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* Copyright (C) 2005 by Dominic Rath *
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* Dominic.Rath@gmx.de *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; either version 2 of the License, or *
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* (at your option) any later version. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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* *
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* You should have received a copy of the GNU General Public License *
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* along with this program; if not, write to the *
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* Free Software Foundation, Inc., *
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
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***************************************************************************/
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#ifndef ARM920T_H
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#define ARM920T_H
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#include "arm9tdmi.h"
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#include "armv4_5_mmu.h"
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#define ARM920T_COMMON_MAGIC 0xa920a920
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struct arm920t_common {
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struct arm7_9_common arm7_9_common;
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uint32_t common_magic;
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struct armv4_5_mmu_common armv4_5_mmu;
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uint32_t cp15_control_reg;
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uint32_t d_fsr;
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uint32_t i_fsr;
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uint32_t d_far;
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uint32_t i_far;
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int preserve_cache;
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};
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static inline struct arm920t_common *target_to_arm920(struct target *target)
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{
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return container_of(target->arch_info, struct arm920t_common, arm7_9_common.arm);
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}
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struct arm920t_cache_line {
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uint32_t cam;
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uint32_t data[8];
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};
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struct arm920t_tlb_entry {
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uint32_t cam;
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uint32_t ram1;
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uint32_t ram2;
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};
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int arm920t_arch_state(struct target *target);
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int arm920t_soft_reset_halt(struct target *target);
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int arm920t_read_memory(struct target *target,
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uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
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int arm920t_write_memory(struct target *target,
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uint32_t address, uint32_t size, uint32_t count, const uint8_t *buffer);
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int arm920t_write_memory_opt(struct target *target,
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uint32_t address, uint32_t size, uint32_t count, const uint8_t *buffer);
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int arm920t_post_debug_entry(struct target *target);
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void arm920t_pre_restore_context(struct target *target);
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int arm920t_get_ttb(struct target *target, uint32_t *result);
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int arm920t_disable_mmu_caches(struct target *target,
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int mmu, int d_u_cache, int i_cache);
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int arm920t_enable_mmu_caches(struct target *target,
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int mmu, int d_u_cache, int i_cache);
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extern const struct command_registration arm920t_command_handlers[];
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#endif /* ARM920T_H */
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