c0f81fbee7
includes target configuration for i.MX8M SoC family, board file needs to set up CHIPNAME and CHIPCORES to match the actual hardware configuration Change-Id: Ieb6d89cab2477a58f85d0ef9cd242710950191c0 Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/4434 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
56 lines
1.3 KiB
INI
56 lines
1.3 KiB
INI
#
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# configuration file for NXP i.MX8M family of SoCs
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#
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME imx8m
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}
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if { [info exists CHIPCORES] } {
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set _cores $CHIPCORES
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} else {
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set _cores 1
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}
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# CoreSight Debug Access Port
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if { [info exists DAP_TAPID] } {
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set _DAP_TAPID $DAP_TAPID
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} else {
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set _DAP_TAPID 0x5ba00477
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}
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# the DAP tap
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x01 -irmask 0x0f \
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-expected-id $_DAP_TAPID
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dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
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set _TARGETNAME $_CHIPNAME.a53
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set _CTINAME $_CHIPNAME.cti
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set DBGBASE {0x80410000 0x80510000 0x80610000 0x80710000}
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set CTIBASE {0x80420000 0x80520000 0x80620000 0x80720000}
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for { set _core 0 } { $_core < $_cores } { incr _core } {
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cti create $_CTINAME.$_core -dap $_CHIPNAME.dap -ap-num 1 \
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-ctibase [lindex $CTIBASE $_core]
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set _command "target create $_TARGETNAME.$_core aarch64 -dap $_CHIPNAME.dap \
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-dbgbase [lindex $DBGBASE $_core] -cti $_CTINAME.$_core"
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if { $_core != 0 } {
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# non-boot core examination may fail
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set _command "$_command -defer-examine"
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set _smp_command "$_smp_command $_TARGETNAME.$_core"
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} else {
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set _smp_command "target smp $_TARGETNAME.$_core"
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}
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eval $_command
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}
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eval $_smp_command
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targets $_TARGETNAME.0
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