Tim Newsome 6441fe8d9d riscv: Clear type 6 triggers on connecting. ... I missed this when I first add mcontrol6 support. https://github.com/riscv/riscv-openocd/pull/648 Change-Id: I1a2706c7ea3a6757ed5083091cd2c764a8b0267c Signed-off-by: Tim Newsome <tim@sifive.com> Reviewed-on: https://review.openocd.org/c/openocd/+/6684 Tested-by: jenkins Reviewed-by: Jan Matyas <matyas@codasip.com> Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>		2021-11-20 14:39:52 +00:00
..
asm.h	Upstream tons of RISC-V changes.	2020-10-14 05:43:05 +01:00
batch.c	Upstream a whole host of RISC-V changes.	2021-10-25 16:12:05 +00:00
batch.h	Upstream tons of RISC-V changes.	2020-10-14 05:43:05 +01:00
debug_defines.h	riscv: Regenerated debug_defines.h and encoding.h	2021-11-20 14:39:13 +00:00
encoding.h	riscv: Regenerated debug_defines.h and encoding.h	2021-11-20 14:39:13 +00:00
gdb_regs.h	Upstream tons of RISC-V changes.	2020-10-14 05:43:05 +01:00
Makefile.am	Add RISC-V support.	2018-07-24 13:07:26 +01:00
opcodes.h	Upstream a whole host of RISC-V changes.	2021-10-25 16:12:05 +00:00
program.c	Upstream tons of RISC-V changes.	2020-10-14 05:43:05 +01:00
program.h	Upstream a whole host of RISC-V changes.	2021-10-25 16:12:05 +00:00
riscv_semihosting.c	Upstream a whole host of RISC-V changes.	2021-10-25 16:12:05 +00:00
riscv-011.c	Upstream a whole host of RISC-V changes.	2021-10-25 16:12:05 +00:00
riscv-013.c	Upstream a whole host of RISC-V changes.	2021-10-25 16:12:05 +00:00
riscv.c	riscv: Clear type 6 triggers on connecting.	2021-11-20 14:39:52 +00:00
riscv.h	Upstream a whole host of RISC-V changes.	2021-10-25 16:12:05 +00:00