openocd/tcl/target/quark_x10xx.cfg
Adrian Burns 1338cf60b9 quark_x10xx: add new target quark_x10xx
Intel Quark X10xx SoC debug support added
Lakemont version 1 (LMT1) is the x86 core in Quark X10xx SoC
Generic x86 32-bit code is in x86_32_common.c/h

Change-Id: If2bf77275cd0277a82558cd9895b4c66155cf368
Signed-off-by: adrian.burns@intel.com
Reviewed-on: http://openocd.zylin.com/1829
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2014-02-11 13:07:29 +00:00

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1.2 KiB
INI

if { [info exists CHIPNAME] } {
set _CHIPNAME $CHIPNAME
} else {
set _CHIPNAME quark_x10xx
}
if { [info exists ENDIAN] } {
set _ENDIAN $ENDIAN
} else {
set _ENDIAN little
}
if { [info exists CPUTAPID] } {
set _CPUTAPID $CPUTAPID
} else {
set _CPUTAPID 0x18289013
}
jtag newtap quark_x10xx cpu -irlen 8 -irmask 0xff -expected-id $_CPUTAPID -disable
jtag newtap quark_x10xx cltap -irlen 8 -irmask 0xff -expected-id 0x0e681013 -enable
#openocd puts tap at front of chain not end of chain
proc quark_x10xx_tapenable {} {
echo "enabling core tap"
irscan quark_x10xx.cltap 0x11
drscan quark_x10xx.cltap 64 1
runtest 10
}
proc quark_x10xx_tapdisable {} {
echo "disabling core tap"
irscan quark_x10xx.cltap 0x11
drscan quark_x10xx.cltap 64 0
runtest 10
}
proc quark_x10xx_setup {} {
jtag tapenable quark_x10xx.cpu
}
jtag configure $_CHIPNAME.cpu -event tap-enable \
"quark_x10xx_tapenable"
jtag configure $_CHIPNAME.cpu -event tap-disable \
"quark_x10xx_tapdisable"
set _TARGETNAME $_CHIPNAME.cpu
target create quark_x10xx.cpu quark_x10xx -endian $_ENDIAN -chain-position quark_x10xx.cpu
jtag configure $_CHIPNAME.cpu -event setup \
"quark_x10xx_setup"