411 lines
12 KiB
C
411 lines
12 KiB
C
/***************************************************************************
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* Copyright (C) 2009 by David Brownell *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; either version 2 of the License, or *
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* (at your option) any later version. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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* *
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* You should have received a copy of the GNU General Public License *
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* along with this program; if not, write to the *
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* Free Software Foundation, Inc., *
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* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
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***************************************************************************/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include "replacements.h"
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#include "armv7a.h"
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#include "arm_disassembler.h"
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#include "target.h"
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#include "register.h"
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#include "log.h"
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#include "binarybuffer.h"
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#include "command.h"
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#include <stdlib.h>
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#include <string.h>
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#include <unistd.h>
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bitfield_desc_t armv7a_psr_bitfield_desc[] =
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{
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{"M[4:0]", 5},
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{"T", 1},
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{"F", 1},
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{"I", 1},
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{"A", 1},
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{"E", 1},
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{"IT[7:2]", 6},
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{"GE[3:0]", 4},
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{"reserved(DNM)", 4},
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{"J", 1},
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{"IT[0:1]", 2},
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{"Q", 1},
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{"V", 1},
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{"C", 1},
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{"Z", 1},
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{"N", 1},
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};
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char* armv7a_core_reg_list[] =
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{
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"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
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"r8", "r9", "r10", "r11", "r12", "r13_usr", "lr_usr", "pc",
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"r8_fiq", "r9_fiq", "r10_fiq", "r11_fiq", "r12_fiq", "r13_fiq", "lr_fiq",
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"r13_irq", "lr_irq",
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"r13_svc", "lr_svc",
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"r13_abt", "lr_abt",
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"r13_und", "lr_und",
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"cpsr", "spsr_fiq", "spsr_irq", "spsr_svc", "spsr_abt", "spsr_und",
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"r13_mon", "lr_mon", "spsr_mon"
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};
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char * armv7a_mode_strings_list[] =
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{
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"Illegal mode value", "User", "FIQ", "IRQ",
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"Supervisor", "Abort", "Undefined", "System", "Monitor"
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};
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/* Hack! Yuk! allow -1 index, which simplifies codepaths elsewhere in the code */
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char** armv7a_mode_strings = armv7a_mode_strings_list+1;
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char* armv7a_state_strings[] =
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{
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"ARM", "Thumb", "Jazelle", "ThumbEE"
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};
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armv7a_core_reg_t armv7a_core_reg_list_arch_info[] =
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{
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{0, ARMV4_5_MODE_ANY, NULL, NULL},
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{1, ARMV4_5_MODE_ANY, NULL, NULL},
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{2, ARMV4_5_MODE_ANY, NULL, NULL},
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{3, ARMV4_5_MODE_ANY, NULL, NULL},
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{4, ARMV4_5_MODE_ANY, NULL, NULL},
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{5, ARMV4_5_MODE_ANY, NULL, NULL},
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{6, ARMV4_5_MODE_ANY, NULL, NULL},
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{7, ARMV4_5_MODE_ANY, NULL, NULL},
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{8, ARMV4_5_MODE_ANY, NULL, NULL},
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{9, ARMV4_5_MODE_ANY, NULL, NULL},
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{10, ARMV4_5_MODE_ANY, NULL, NULL},
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{11, ARMV4_5_MODE_ANY, NULL, NULL},
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{12, ARMV4_5_MODE_ANY, NULL, NULL},
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{13, ARMV4_5_MODE_USR, NULL, NULL},
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{14, ARMV4_5_MODE_USR, NULL, NULL},
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{15, ARMV4_5_MODE_ANY, NULL, NULL},
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{8, ARMV4_5_MODE_FIQ, NULL, NULL},
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{9, ARMV4_5_MODE_FIQ, NULL, NULL},
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{10, ARMV4_5_MODE_FIQ, NULL, NULL},
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{11, ARMV4_5_MODE_FIQ, NULL, NULL},
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{12, ARMV4_5_MODE_FIQ, NULL, NULL},
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{13, ARMV4_5_MODE_FIQ, NULL, NULL},
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{14, ARMV4_5_MODE_FIQ, NULL, NULL},
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{13, ARMV4_5_MODE_IRQ, NULL, NULL},
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{14, ARMV4_5_MODE_IRQ, NULL, NULL},
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{13, ARMV4_5_MODE_SVC, NULL, NULL},
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{14, ARMV4_5_MODE_SVC, NULL, NULL},
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{13, ARMV4_5_MODE_ABT, NULL, NULL},
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{14, ARMV4_5_MODE_ABT, NULL, NULL},
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{13, ARMV4_5_MODE_UND, NULL, NULL},
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{14, ARMV4_5_MODE_UND, NULL, NULL},
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{16, ARMV4_5_MODE_ANY, NULL, NULL},
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{16, ARMV4_5_MODE_FIQ, NULL, NULL},
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{16, ARMV4_5_MODE_IRQ, NULL, NULL},
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{16, ARMV4_5_MODE_SVC, NULL, NULL},
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{16, ARMV4_5_MODE_ABT, NULL, NULL},
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{16, ARMV4_5_MODE_UND, NULL, NULL},
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{13, ARMV7A_MODE_MON, NULL, NULL},
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{14, ARMV7A_MODE_MON, NULL, NULL},
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{16, ARMV7A_MODE_MON, NULL, NULL}
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};
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/* map core mode (USR, FIQ, ...) and register number to indizes into the register cache */
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int armv7a_core_reg_map[8][17] =
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{
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{ /* USR */
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0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 31
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},
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{ /* FIQ */
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0, 1, 2, 3, 4, 5, 6, 7, 16, 17, 18, 19, 20, 21, 22, 15, 32
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},
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{ /* IRQ */
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0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 23, 24, 15, 33
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},
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{ /* SVC */
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0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 25, 26, 15, 34
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},
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{ /* ABT */
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0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 27, 28, 15, 35
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},
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{ /* UND */
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0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 29, 30, 15, 36
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},
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{ /* SYS */
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0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 31
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},
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{ /* MON */
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/* TODO Fix the register mapping for mon, we need r13_mon,
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* r14_mon and spsr_mon
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*/
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0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 31
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}
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};
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uint8_t armv7a_gdb_dummy_fp_value[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
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reg_t armv7a_gdb_dummy_fp_reg =
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{
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"GDB dummy floating-point register", armv7a_gdb_dummy_fp_value,
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0, 1, 96, NULL, 0, NULL, 0
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};
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void armv7a_show_fault_registers(target_t *target)
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{
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uint32_t dfsr, ifsr, dfar, ifar;
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/* get pointers to arch-specific information */
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armv4_5_common_t *armv4_5 = target->arch_info;
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armv7a_common_t *armv7a = armv4_5->arch_info;
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armv7a->read_cp15(target, 0, 0, 5, 0, &dfsr);
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armv7a->read_cp15(target, 0, 1, 5, 0, &ifsr);
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armv7a->read_cp15(target, 0, 0, 6, 0, &dfar);
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armv7a->read_cp15(target, 0, 2, 6, 0, &ifar);
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LOG_USER("Data fault registers DFSR: %8.8" PRIx32
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", DFAR: %8.8" PRIx32, dfsr, dfar);
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LOG_USER("Instruction fault registers IFSR: %8.8" PRIx32
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", IFAR: %8.8" PRIx32, ifsr, ifar);
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}
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int armv7a_arch_state(struct target_s *target)
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{
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static const char *state[] =
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{
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"disabled", "enabled"
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};
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armv4_5_common_t *armv4_5 = target->arch_info;
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armv7a_common_t *armv7a = armv4_5->arch_info;
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if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC)
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{
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LOG_ERROR("BUG: called for a non-ARMv4/5 target");
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exit(-1);
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}
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LOG_USER("target halted in %s state due to %s, current mode: %s\n"
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"%s: 0x%8.8" PRIx32 " pc: 0x%8.8" PRIx32 "\n"
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"MMU: %s, D-Cache: %s, I-Cache: %s",
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armv7a_state_strings[armv7a->core_state],
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Jim_Nvp_value2name_simple(nvp_target_debug_reason,
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target->debug_reason)->name,
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armv7a_mode_strings[
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armv7a_mode_to_number(armv4_5->core_mode)],
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armv7a_core_reg_list[armv7a_core_reg_map[
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armv7a_mode_to_number(armv4_5->core_mode)][16]],
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buf_get_u32(ARMV7A_CORE_REG_MODE(armv4_5->core_cache,
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armv4_5->core_mode, 16).value, 0, 32),
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buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32),
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state[armv7a->armv4_5_mmu.mmu_enabled],
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state[armv7a->armv4_5_mmu.armv4_5_cache.d_u_cache_enabled],
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state[armv7a->armv4_5_mmu.armv4_5_cache.i_cache_enabled]);
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if (armv4_5->core_mode == ARMV7A_MODE_ABT)
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armv7a_show_fault_registers(target);
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return ERROR_OK;
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}
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static int handle_dap_baseaddr_command(struct command_context_s *cmd_ctx,
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char *cmd, char **args, int argc)
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{
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target_t *target = get_current_target(cmd_ctx);
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armv4_5_common_t *armv4_5 = target->arch_info;
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armv7a_common_t *armv7a = armv4_5->arch_info;
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swjdp_common_t *swjdp = &armv7a->swjdp_info;
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return dap_baseaddr_command(cmd_ctx, swjdp, args, argc);
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}
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static int handle_dap_memaccess_command(struct command_context_s *cmd_ctx,
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char *cmd, char **args, int argc)
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{
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target_t *target = get_current_target(cmd_ctx);
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armv4_5_common_t *armv4_5 = target->arch_info;
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armv7a_common_t *armv7a = armv4_5->arch_info;
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swjdp_common_t *swjdp = &armv7a->swjdp_info;
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return dap_memaccess_command(cmd_ctx, swjdp, args, argc);
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}
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static int handle_dap_apsel_command(struct command_context_s *cmd_ctx,
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char *cmd, char **args, int argc)
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{
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target_t *target = get_current_target(cmd_ctx);
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armv4_5_common_t *armv4_5 = target->arch_info;
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armv7a_common_t *armv7a = armv4_5->arch_info;
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swjdp_common_t *swjdp = &armv7a->swjdp_info;
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return dap_apsel_command(cmd_ctx, swjdp, args, argc);
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}
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static int handle_dap_apid_command(struct command_context_s *cmd_ctx,
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char *cmd, char **args, int argc)
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{
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target_t *target = get_current_target(cmd_ctx);
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armv4_5_common_t *armv4_5 = target->arch_info;
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armv7a_common_t *armv7a = armv4_5->arch_info;
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swjdp_common_t *swjdp = &armv7a->swjdp_info;
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return dap_apid_command(cmd_ctx, swjdp, args, argc);
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}
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static int handle_dap_info_command(struct command_context_s *cmd_ctx,
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char *cmd, char **args, int argc)
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{
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target_t *target = get_current_target(cmd_ctx);
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armv4_5_common_t *armv4_5 = target->arch_info;
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armv7a_common_t *armv7a = armv4_5->arch_info;
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swjdp_common_t *swjdp = &armv7a->swjdp_info;
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uint32_t apsel;
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apsel = swjdp->apsel;
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if (argc > 0)
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apsel = strtoul(args[0], NULL, 0);
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return dap_info_command(cmd_ctx, swjdp, apsel);
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}
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static int
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handle_armv7a_disassemble_command(struct command_context_s *cmd_ctx,
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char *cmd, char **args, int argc)
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{
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target_t *target = get_current_target(cmd_ctx);
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armv4_5_common_t *armv4_5 = target->arch_info;
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int thumb = 0;
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int count = 1;
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uint32_t address;
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int i;
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if (armv4_5->common_magic != ARMV4_5_COMMON_MAGIC) {
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command_print(cmd_ctx, "current target isn't an ARM target");
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return ERROR_OK;
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}
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/* REVISIT: eventually support ThumbEE disassembly too;
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* some opcodes work differently.
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*/
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switch (argc) {
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case 3:
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if (strcmp(args[2], "thumb") != 0)
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goto usage;
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thumb = 1;
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/* FALL THROUGH */
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case 2:
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count = strtoul(args[1], NULL, 0);
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/* FALL THROUGH */
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case 1:
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address = strtoul(args[0], NULL, 0);
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if (address & 0x01) {
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if (!thumb) {
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command_print(cmd_ctx, "Disassemble as Thumb");
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thumb = 1;
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}
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address &= ~1;
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}
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break;
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default:
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usage:
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command_print(cmd_ctx,
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"usage: armv4_5 disassemble <address> [<count> ['thumb']]");
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return ERROR_OK;
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}
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for (i = 0; i < count; i++) {
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arm_instruction_t cur_instruction;
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int retval;
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if (thumb) {
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retval = thumb2_opcode(target, address, &cur_instruction);
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if (retval != ERROR_OK)
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return retval;
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address += cur_instruction.instruction_size;
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} else {
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uint32_t opcode;
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retval = target_read_u32(target, address, &opcode);
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if (retval != ERROR_OK)
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return retval;
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retval = arm_evaluate_opcode(opcode, address,
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&cur_instruction);
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if (retval != ERROR_OK)
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return retval;
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address += 4;
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}
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command_print(cmd_ctx, "%s", cur_instruction.text);
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}
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return ERROR_OK;
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}
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int armv7a_register_commands(struct command_context_s *cmd_ctx)
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{
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command_t *arm_adi_v5_dap_cmd;
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command_t *armv7a_cmd;
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arm_adi_v5_dap_cmd = register_command(cmd_ctx, NULL, "dap",
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NULL, COMMAND_ANY,
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"cortex dap specific commands");
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register_command(cmd_ctx, arm_adi_v5_dap_cmd, "info",
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handle_dap_info_command, COMMAND_EXEC,
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"dap info for ap [num], "
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"default currently selected AP");
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register_command(cmd_ctx, arm_adi_v5_dap_cmd, "apsel",
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handle_dap_apsel_command, COMMAND_EXEC,
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"select a different AP [num] (default 0)");
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register_command(cmd_ctx, arm_adi_v5_dap_cmd, "apid",
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handle_dap_apid_command, COMMAND_EXEC,
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"return id reg from AP [num], "
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"default currently selected AP");
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register_command(cmd_ctx, arm_adi_v5_dap_cmd, "baseaddr",
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handle_dap_baseaddr_command, COMMAND_EXEC,
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"return debug base address from AP [num], "
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"default currently selected AP");
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register_command(cmd_ctx, arm_adi_v5_dap_cmd, "memaccess",
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handle_dap_memaccess_command, COMMAND_EXEC,
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"set/get number of extra tck for mem-ap memory "
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"bus access [0-255]");
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armv7a_cmd = register_command(cmd_ctx, NULL, "armv7a",
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NULL, COMMAND_ANY,
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"ARMv7-A specific commands");
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register_command(cmd_ctx, armv7a_cmd, "disassemble",
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handle_armv7a_disassemble_command, COMMAND_EXEC,
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"disassemble instructions <address> [<count> ['thumb']]");
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return ERROR_OK;
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}
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