f2b4897773
The device has compatible flash macro with STM32F1 family, reuse stm32f1x driver code. Detect non-ARM target - for simplicy test target type name 'riscv' and the address has 32 bits. In case of RISC-V CPU use simple chunked write algo - async algo cannot be used as the core implemented in this device doesn't allow memory access while running. Change-Id: Ie3886fbd8573652691f91a02335812a7300689f7 Signed-off-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-on: https://review.openocd.org/c/openocd/+/6704 Tested-by: jenkins Reviewed-by: Tim Newsome <tim@sifive.com>
29 lines
472 B
Makefile
29 lines
472 B
Makefile
BIN2C = ../../../../src/helper/bin2char.sh
|
|
|
|
CROSS_COMPILE ?= riscv-none-embed-
|
|
|
|
CC=$(CROSS_COMPILE)gcc
|
|
OBJCOPY=$(CROSS_COMPILE)objcopy
|
|
OBJDUMP=$(CROSS_COMPILE)objdump
|
|
|
|
CFLAGS = -march=rv32i -mabi=ilp32 -static -nostartfiles -nostdlib -Os -g -fPIC
|
|
|
|
all: gd32vf103.inc
|
|
|
|
.PHONY: clean
|
|
|
|
%.elf: %.c
|
|
$(CC) $(CFLAGS) $< -o $@
|
|
|
|
%.lst: %.elf
|
|
$(OBJDUMP) -S $< > $@
|
|
|
|
%.bin: %.elf
|
|
$(OBJCOPY) -Obinary $< $@
|
|
|
|
%.inc: %.bin
|
|
$(BIN2C) < $< > $@
|
|
|
|
clean:
|
|
-rm -f *.elf *.lst *.bin *.inc
|