304 lines
9.1 KiB
C
304 lines
9.1 KiB
C
/*
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* Copyright (C) 2009 by Marvell Semiconductors, Inc.
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* Written by Nicolas Pitre <nico at marvell.com>
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*
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* Copyright (C) 2009 by David Brownell
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the
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* Free Software Foundation, Inc.,
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* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include "core.h"
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#include "arm_io.h"
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#include <helper/binarybuffer.h>
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#include <target/arm.h>
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#include <target/armv7m.h>
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#include <target/algorithm.h>
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/**
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* Copies code to a working area. This will allocate room for the code plus the
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* additional amount requested if the working area pointer is null.
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*
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* @param target Pointer to the target to copy code to
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* @param code Pointer to the code area to be copied
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* @param code_size Size of the code being copied
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* @param additional Size of the additional area to be allocated in addition to
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* code
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* @param area Pointer to a pointer to a working area to copy code to
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* @return Success or failure of the operation
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*/
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static int arm_code_to_working_area(struct target *target,
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const uint32_t *code, unsigned code_size,
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unsigned additional, struct working_area **area)
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{
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uint8_t code_buf[code_size];
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unsigned i;
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int retval;
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unsigned size = code_size + additional;
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/* REVISIT this assumes size doesn't ever change.
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* That's usually correct; but there are boards with
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* both large and small page chips, where it won't be...
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*/
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/* make sure we have a working area */
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if (NULL == *area) {
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retval = target_alloc_working_area(target, size, area);
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if (retval != ERROR_OK) {
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LOG_DEBUG("%s: no %d byte buffer", __func__, (int) size);
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return ERROR_NAND_NO_BUFFER;
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}
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}
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/* buffer code in target endianness */
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for (i = 0; i < code_size / 4; i++)
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target_buffer_set_u32(target, code_buf + i * 4, code[i]);
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/* copy code to work area */
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retval = target_write_memory(target, (*area)->address,
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4, code_size / 4, code_buf);
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return retval;
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}
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/**
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* ARM-specific bulk write from buffer to address of 8-bit wide NAND.
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* For now this supports ARMv4,ARMv5 and ARMv7-M cores.
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*
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* Enhancements to target_run_algorithm() could enable:
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* - ARMv6 and ARMv7 cores in ARM mode
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*
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* Different code fragments could handle:
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* - 16-bit wide data (needs different setup)
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*
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* @param nand Pointer to the arm_nand_data struct that defines the I/O
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* @param data Pointer to the data to be copied to flash
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* @param size Size of the data being copied
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* @return Success or failure of the operation
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*/
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int arm_nandwrite(struct arm_nand_data *nand, uint8_t *data, int size)
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{
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struct target *target = nand->target;
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struct arm_algorithm armv4_5_algo;
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struct armv7m_algorithm armv7m_algo;
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void *arm_algo;
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struct arm *arm = target->arch_info;
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struct reg_param reg_params[3];
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uint32_t target_buf;
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uint32_t exit_var = 0;
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int retval;
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/* Inputs:
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* r0 NAND data address (byte wide)
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* r1 buffer address
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* r2 buffer length
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*/
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static const uint32_t code_armv4_5[] = {
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0xe4d13001, /* s: ldrb r3, [r1], #1 */
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0xe5c03000, /* strb r3, [r0] */
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0xe2522001, /* subs r2, r2, #1 */
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0x1afffffb, /* bne s */
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/* exit: ARMv4 needs hardware breakpoint */
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0xe1200070, /* e: bkpt #0 */
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};
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/* Inputs:
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* r0 NAND data address (byte wide)
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* r1 buffer address
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* r2 buffer length
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*
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* see contrib/loaders/flash/armv7m_io.s for src
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*/
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static const uint32_t code_armv7m[] = {
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0x3b01f811,
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0x3a017003,
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0xaffaf47f,
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0xbf00be00,
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};
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int target_code_size = 0;
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const uint32_t *target_code_src = NULL;
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/* set up algorithm */
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if (is_armv7m(target_to_armv7m(target))) { /* armv7m target */
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armv7m_algo.common_magic = ARMV7M_COMMON_MAGIC;
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armv7m_algo.core_mode = ARM_MODE_THREAD;
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arm_algo = &armv7m_algo;
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target_code_size = sizeof(code_armv7m);
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target_code_src = code_armv7m;
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} else {
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armv4_5_algo.common_magic = ARM_COMMON_MAGIC;
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armv4_5_algo.core_mode = ARM_MODE_SVC;
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armv4_5_algo.core_state = ARM_STATE_ARM;
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arm_algo = &armv4_5_algo;
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target_code_size = sizeof(code_armv4_5);
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target_code_src = code_armv4_5;
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}
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if (nand->op != ARM_NAND_WRITE || !nand->copy_area) {
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retval = arm_code_to_working_area(target, target_code_src, target_code_size,
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nand->chunk_size, &nand->copy_area);
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if (retval != ERROR_OK)
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return retval;
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}
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nand->op = ARM_NAND_WRITE;
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/* copy data to work area */
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target_buf = nand->copy_area->address + target_code_size;
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retval = target_write_buffer(target, target_buf, size, data);
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if (retval != ERROR_OK)
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return retval;
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/* set up parameters */
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init_reg_param(®_params[0], "r0", 32, PARAM_IN);
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init_reg_param(®_params[1], "r1", 32, PARAM_IN);
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init_reg_param(®_params[2], "r2", 32, PARAM_IN);
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buf_set_u32(reg_params[0].value, 0, 32, nand->data);
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buf_set_u32(reg_params[1].value, 0, 32, target_buf);
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buf_set_u32(reg_params[2].value, 0, 32, size);
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/* armv4 must exit using a hardware breakpoint */
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if (arm->is_armv4)
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exit_var = nand->copy_area->address + target_code_size - 4;
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/* use alg to write data from work area to NAND chip */
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retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
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nand->copy_area->address, exit_var, 1000, arm_algo);
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if (retval != ERROR_OK)
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LOG_ERROR("error executing hosted NAND write");
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destroy_reg_param(®_params[0]);
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destroy_reg_param(®_params[1]);
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destroy_reg_param(®_params[2]);
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return retval;
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}
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/**
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* Uses an on-chip algorithm for an ARM device to read from a NAND device and
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* store the data into the host machine's memory.
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*
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* @param nand Pointer to the arm_nand_data struct that defines the I/O
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* @param data Pointer to the data buffer to store the read data
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* @param size Amount of data to be stored to the buffer.
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* @return Success or failure of the operation
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*/
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int arm_nandread(struct arm_nand_data *nand, uint8_t *data, uint32_t size)
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{
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struct target *target = nand->target;
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struct arm_algorithm armv4_5_algo;
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struct armv7m_algorithm armv7m_algo;
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void *arm_algo;
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struct arm *arm = target->arch_info;
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struct reg_param reg_params[3];
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uint32_t target_buf;
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uint32_t exit_var = 0;
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int retval;
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/* Inputs:
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* r0 buffer address
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* r1 NAND data address (byte wide)
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* r2 buffer length
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*/
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static const uint32_t code_armv4_5[] = {
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0xe5d13000, /* s: ldrb r3, [r1] */
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0xe4c03001, /* strb r3, [r0], #1 */
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0xe2522001, /* subs r2, r2, #1 */
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0x1afffffb, /* bne s */
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/* exit: ARMv4 needs hardware breakpoint */
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0xe1200070, /* e: bkpt #0 */
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};
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/* Inputs:
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* r0 buffer address
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* r1 NAND data address (byte wide)
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* r2 buffer length
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*
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* see contrib/loaders/flash/armv7m_io.s for src
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*/
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static const uint32_t code_armv7m[] = {
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0xf800780b,
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0x3a013b01,
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0xaffaf47f,
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0xbf00be00,
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};
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int target_code_size = 0;
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const uint32_t *target_code_src = NULL;
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/* set up algorithm */
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if (is_armv7m(target_to_armv7m(target))) { /* armv7m target */
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armv7m_algo.common_magic = ARMV7M_COMMON_MAGIC;
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armv7m_algo.core_mode = ARM_MODE_THREAD;
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arm_algo = &armv7m_algo;
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target_code_size = sizeof(code_armv7m);
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target_code_src = code_armv7m;
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} else {
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armv4_5_algo.common_magic = ARM_COMMON_MAGIC;
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armv4_5_algo.core_mode = ARM_MODE_SVC;
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armv4_5_algo.core_state = ARM_STATE_ARM;
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arm_algo = &armv4_5_algo;
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target_code_size = sizeof(code_armv4_5);
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target_code_src = code_armv4_5;
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}
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/* create the copy area if not yet available */
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if (nand->op != ARM_NAND_READ || !nand->copy_area) {
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retval = arm_code_to_working_area(target, target_code_src, target_code_size,
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nand->chunk_size, &nand->copy_area);
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if (retval != ERROR_OK)
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return retval;
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}
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nand->op = ARM_NAND_READ;
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target_buf = nand->copy_area->address + target_code_size;
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/* set up parameters */
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init_reg_param(®_params[0], "r0", 32, PARAM_IN);
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init_reg_param(®_params[1], "r1", 32, PARAM_IN);
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init_reg_param(®_params[2], "r2", 32, PARAM_IN);
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buf_set_u32(reg_params[0].value, 0, 32, target_buf);
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buf_set_u32(reg_params[1].value, 0, 32, nand->data);
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buf_set_u32(reg_params[2].value, 0, 32, size);
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/* armv4 must exit using a hardware breakpoint */
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if (arm->is_armv4)
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exit_var = nand->copy_area->address + target_code_size - 4;
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/* use alg to write data from NAND chip to work area */
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retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
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nand->copy_area->address, exit_var, 1000, arm_algo);
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if (retval != ERROR_OK)
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LOG_ERROR("error executing hosted NAND read");
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destroy_reg_param(®_params[0]);
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destroy_reg_param(®_params[1]);
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destroy_reg_param(®_params[2]);
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/* read from work area to the host's memory */
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retval = target_read_buffer(target, target_buf, size, data);
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return retval;
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}
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