a1bbf4b75b
It depends on the particular target whether it can work with SRST asserted or not, so this belongs to the target config rather than the board config. Also, this allows for simple openocd -f myboard.cfg -c "reset_config connect_assert_srst" command to be used whenever a user feels a need to connect to an unresponsive target. Change-Id: I3d8da9ae47088fc0c75a20bfdd20074be1014de0 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/2459 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
78 lines
1.7 KiB
INI
78 lines
1.7 KiB
INI
#
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# M0+ devices only have SW-DP, but swj-dp code works, just don't
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# set any jtag related features
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#
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source [find target/swj-dp.tcl]
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME stm32l0
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}
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set _ENDIAN little
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# Work-area is a space in RAM used for flash programming
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# By default use 8kB (max ram on smallest part)
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if { [info exists WORKAREASIZE] } {
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set _WORKAREASIZE $WORKAREASIZE
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} else {
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set _WORKAREASIZE 0x2000
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}
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# JTAG speed should be <= F_CPU/6.
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# F_CPU after reset is ~2MHz, so use F_JTAG max = 333kHz
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adapter_khz 300
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adapter_nsrst_delay 100
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if { [info exists CPUTAPID] } {
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set _CPUTAPID $CPUTAPID
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} else {
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# Arm, m0+, non-multidrop.
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# http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.faqs/ka16088.html
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set _CPUTAPID 0x0bc11477
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}
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swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
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$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
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# flash size will be probed
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set _FLASHNAME $_CHIPNAME.flash
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flash bank $_FLASHNAME stm32lx 0x08000000 0 0 0 $_TARGETNAME
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reset_config srst_nogate
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if {![using_hla]} {
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# if srst is not fitted use SYSRESETREQ to
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# perform a soft reset
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cortex_m reset_config sysresetreq
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}
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proc stm32l0_enable_HSI16 {} {
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# Enable HSI16 as clock source
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echo "STM32L0: Enabling HSI16"
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# Set HSI16ON in RCC_CR (leave MSI enabled)
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mww 0x40021000 0x00000101
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# Set HSI16 as SYSCLK (RCC_CFGR)
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mww 0x4002100c 0x00000001
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# Increase speed
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adapter_khz 2500
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}
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$_TARGETNAME configure -event reset-init {
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stm32l0_enable_HSI16
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}
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$_TARGETNAME configure -event reset-start {
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adapter_khz 300
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}
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