d0e763ac7e
Also make GPL notices consistent according to: https://www.gnu.org/licenses/gpl-howto.html Change-Id: I84c9df40a774958a7ed91460c5d931cfab9f45ba Signed-off-by: Marc Schink <openocd-dev@marcschink.de> Reviewed-on: http://openocd.zylin.com/3488 Tested-by: jenkins Reviewed-by: Andreas Färber <afaerber@suse.de> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
117 lines
3.6 KiB
C
117 lines
3.6 KiB
C
/***************************************************************************
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* Copyright (C) 2007, 2008 by Ben Dooks *
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* ben@fluff.org *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; either version 2 of the License, or *
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* (at your option) any later version. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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* *
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* You should have received a copy of the GNU General Public License *
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* along with this program. If not, see <http://www.gnu.org/licenses/>. *
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***************************************************************************/
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/*
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* S3C2410 OpenOCD NAND Flash controller support.
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*
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* Many thanks to Simtec Electronics for sponsoring this work.
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*/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include "s3c24xx.h"
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NAND_DEVICE_COMMAND_HANDLER(s3c2410_nand_device_command)
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{
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struct s3c24xx_nand_controller *info;
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CALL_S3C24XX_DEVICE_COMMAND(nand, &info);
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/* fill in the address fields for the core device */
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info->cmd = S3C2410_NFCMD;
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info->addr = S3C2410_NFADDR;
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info->data = S3C2410_NFDATA;
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info->nfstat = S3C2410_NFSTAT;
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return ERROR_OK;
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}
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static int s3c2410_init(struct nand_device *nand)
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{
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struct target *target = nand->target;
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target_write_u32(target, S3C2410_NFCONF,
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S3C2410_NFCONF_EN | S3C2410_NFCONF_TACLS(3) |
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S3C2410_NFCONF_TWRPH0(5) | S3C2410_NFCONF_TWRPH1(3));
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return ERROR_OK;
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}
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static int s3c2410_write_data(struct nand_device *nand, uint16_t data)
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{
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struct target *target = nand->target;
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if (target->state != TARGET_HALTED) {
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LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
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return ERROR_NAND_OPERATION_FAILED;
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}
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target_write_u32(target, S3C2410_NFDATA, data);
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return ERROR_OK;
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}
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static int s3c2410_read_data(struct nand_device *nand, void *data)
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{
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struct target *target = nand->target;
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if (target->state != TARGET_HALTED) {
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LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
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return ERROR_NAND_OPERATION_FAILED;
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}
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target_read_u8(target, S3C2410_NFDATA, data);
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return ERROR_OK;
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}
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static int s3c2410_nand_ready(struct nand_device *nand, int timeout)
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{
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struct target *target = nand->target;
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uint8_t status;
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if (target->state != TARGET_HALTED) {
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LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
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return ERROR_NAND_OPERATION_FAILED;
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}
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do {
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target_read_u8(target, S3C2410_NFSTAT, &status);
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if (status & S3C2410_NFSTAT_BUSY)
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return 1;
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alive_sleep(1);
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} while (timeout-- > 0);
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return 0;
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}
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struct nand_flash_controller s3c2410_nand_controller = {
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.name = "s3c2410",
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.nand_device_command = &s3c2410_nand_device_command,
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.init = &s3c2410_init,
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.reset = &s3c24xx_reset,
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.command = &s3c24xx_command,
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.address = &s3c24xx_address,
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.write_data = &s3c2410_write_data,
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.read_data = &s3c2410_read_data,
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.write_page = s3c24xx_write_page,
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.read_page = s3c24xx_read_page,
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.nand_ready = &s3c2410_nand_ready,
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};
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