0e02fe40c6
This config covers the 4x Cortex A53 CPUs. A custom connector is required from J14 to standard ARM JTAG on v1 boards. However v2 hardware should have a standard FTSH-105-01-L-DV connector. Pinmuxing code to enable JTAG pins is included in l-loader-poplar repository, so board is flashed with open source code, JTAG is available at very early boot. Alternatively the following pokes can be issued from U-Boot to enable JTAG (e.g. to debug hisilicon SDK). mw 0xf8a210ec 0x130; mw 0xf8a210f0 0x130; mw 0xf8a210f4 0x130; mw 0xf8a210f8 0x130; mw 0xf8a210fc 0x130; mw 0xf8a21100 0x130; Change-Id: I2b83dfcb3dc5461c1620f94dd99aa7b31fdda59b Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Reviewed-on: http://openocd.zylin.com/4161 Tested-by: jenkins Reviewed-by: Jiri Kastner <cz172638@gmail.com> Reviewed-by: Paul Fertser <fercerpav@gmail.com>
29 lines
540 B
INI
29 lines
540 B
INI
#
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# board configuration for Tocoding Poplar
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#
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# board does not feature anything but JTAG
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transport select jtag
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adapter_khz 10000
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# SRST-only reset configuration
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reset_config srst_only srst_push_pull
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source [find tcl/target/hi3798.cfg]
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# halt the cores when gdb attaches
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${_TARGETNAME}0 configure -event gdb-attach "halt"
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# make sure the default target is the boot core
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targets ${_TARGETNAME}0
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proc core_up { args } {
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global _TARGETNAME
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# examine remaining cores
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foreach _core [set args] {
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${_TARGETNAME}$_core arp_examine
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}
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}
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