106 lines
4.2 KiB
ArmAsm
106 lines
4.2 KiB
ArmAsm
/***************************************************************************
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* Copyright (C) 2010 by Spencer Oliver *
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* spen@spen-soft.co.uk *
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* *
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* Copyright (C) 2011 Øyvind Harboe *
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* oyvind.harboe@zylin.com *
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* *
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* Copyright (C) 2015 Uwe Bonnes *
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* bon@elektron.ikp.physik.tu-darmstadt.de *
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* *
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* Copyright (C) 2018 Andreas Bolsch *
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* andreas.bolsch@mni.thm.de *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; either version 2 of the License, or *
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* (at your option) any later version. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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* *
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* You should have received a copy of the GNU General Public License *
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* along with this program; if not, write to the *
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* Free Software Foundation, Inc. *
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***************************************************************************/
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.text
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.syntax unified
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.cpu cortex-m0
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.thumb
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/*
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* Params :
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* r0 = workarea start, status (out)
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* r1 = workarea end + 1
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* r2 = target address
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* r3 = count (64bit words)
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* r4 = flash status register
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* r5 = flash control register
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*
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* Clobbered:
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* r6/7 - temp (64-bit)
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*/
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#include "../../../../src/flash/nor/stm32l4x.h"
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.thumb_func
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.global _start
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_start:
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mov r8, r3 /* copy dword count */
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wait_fifo:
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ldr r6, [r0, #0] /* read wp */
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cmp r6, #0 /* if wp == 0, */
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beq exit /* then abort */
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ldr r3, [r0, #4] /* read rp */
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subs r6, r6, r3 /* number of bytes available for read in r6 */
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bpl fifo_stat /* if not wrapped around, skip */
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adds r6, r6, r1 /* add end of buffer */
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subs r6, r6, r0 /* sub start of buffer */
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fifo_stat:
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cmp r6, #8 /* wait until at least one dword available */
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bcc wait_fifo
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movs r6, #FLASH_PG /* flash program enable */
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str r6, [r5] /* write to FLASH_CR, start operation */
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ldmia r3!, {r6, r7} /* read one dword from src, increment ptr */
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stmia r2!, {r6, r7} /* write one dword to dst, increment ptr */
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dsb
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ldr r7, =FLASH_BSY /* FLASH_BSY mask */
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busy:
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ldr r6, [r4] /* get FLASH_SR register */
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tst r6, r7 /* BSY == 1 => operation in progress */
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bne busy /* if still set, wait more ... */
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movs r7, #FLASH_ERROR /* all error bits */
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tst r6, r7 /* check for any error bit */
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bne error /* fail ... */
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cmp r3, r1 /* rp at end of buffer? */
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bcc upd_rp /* if no, then skip */
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subs r3, r3, r1 /* sub end of buffer */
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adds r3, r3, r0 /* add start of buffer */
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adds r3, r3, #8 /* skip wp and rp */
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upd_rp:
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str r3, [r0, #4] /* store rp */
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mov r7, r8 /* get dword count */
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subs r7, r7, #1 /* decrement dword count */
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mov r8, r7 /* save dword count */
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beq exit /* exit if done */
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b wait_fifo
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.pool
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error:
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movs r3, #0
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str r3, [r0, #4] /* set rp = 0 on error */
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exit:
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mov r0, r6 /* return status in r0 */
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movs r6, #0 /* flash program disable */
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str r6, [r5] /* write to FLASH_CR */
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movs r6, #FLASH_ERROR /* all error bits */
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str r6, [r4] /* write to FLASH_CR to clear errors */
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bkpt #0x00
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