d70d9634bf
It's been about a year since these were deprecated and, in most cases, removed. There's no point in carrying that documentation, or backwards compatibility for "jtag_device" and "jtag_speed", around forever. (Or a few remnants of obsolete code...) Removed a few obsolete uses of "jtag_speed": - The Calao stuff hasn't worked since July 2008. (Those Atmel targets need to work with a 32KHz core clock after reset until board-specific init-reset code sets up the PLL and enables a faster JTAg clock.) - Parport speed controls don't actually work (tops out at about 1 MHz on typical HW). - In general, speed controls need to live in board.cfg files (or sometimes target.cfg files), not interface.cfg ... Signed-off-by: David Brownell <dbrownell@users.sourceforge.net>
11 lines
194 B
INI
11 lines
194 B
INI
#
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# Xilinx Parallel Cable III 'DLC 5' (and various clones)
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#
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# http://www.xilinx.com/itp/xilinx4/data/docs/pac/appendixb.html
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#
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interface parport
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parport_port /dev/parport0
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parport_cable dlc5
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