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openocd/src/target/riscv
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Marc Schink a851b91c4c target/riscv-011: Fix memory leak in handle_halt_routine() 
Tested with SiFive HiFive1 development board.

Change-Id: Ie0d9fa0899804d17ccdd84b03ba4028e97b632b8
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4884
Tested-by: jenkins
Reviewed-by: Tim Newsome <tim@sifive.com>
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
2019-02-14 09:28:33 +00:00
..
asm.h Add RISC-V support. 2018-07-24 13:07:26 +01:00
batch.c Add RISC-V support. 2018-07-24 13:07:26 +01:00
batch.h Add RISC-V support. 2018-07-24 13:07:26 +01:00
debug_defines.h Add RISC-V support. 2018-07-24 13:07:26 +01:00
encoding.h Add RISC-V support. 2018-07-24 13:07:26 +01:00
gdb_regs.h Add RISC-V support. 2018-07-24 13:07:26 +01:00
Makefile.am Add RISC-V support. 2018-07-24 13:07:26 +01:00
opcodes.h Add RISC-V support. 2018-07-24 13:07:26 +01:00
program.c Add RISC-V support. 2018-07-24 13:07:26 +01:00
program.h Add RISC-V support. 2018-07-24 13:07:26 +01:00
riscv_semihosting.c Add RISC-V support. 2018-07-24 13:07:26 +01:00
riscv-011.c target/riscv-011: Fix memory leak in handle_halt_routine() 2019-02-14 09:28:33 +00:00
riscv-013.c Add RISC-V support. 2018-07-24 13:07:26 +01:00
riscv.c target algo: do not write reg_param if direction is PARAM_IN 2019-02-07 07:51:50 +00:00
riscv.h Add RISC-V support. 2018-07-24 13:07:26 +01:00