38ac08c1c2
Avoid annoying "deprecated" messages while running the scripts distributed with OpenOCD code. Change automatically created with commands sed -i 's/adapter_khz/adapter speed/g' $(find tcl/ -type f) sed -i 's/adapter_nsrst_delay/adapter srst delay/g' $(find tcl/ -type f) sed -i 's/adapter_nsrst_assert_width/adapter srst pulse_width/g' $(find tcl/ -type f) Minor indentation issue fixed manually in tcl/board/at91sam9g20-ek.cfg tcl/target/at91sam9260_ext_RAM_ext_flash.cfg Change-Id: I425fd56c0c88cd6b06124621306eeb89166dfe71 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5284 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
82 lines
2.2 KiB
INI
82 lines
2.2 KiB
INI
#
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# Freescale i.MX6 series
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#
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# Supports 6Q 6D 6QP 6DP 6DL 6S 6SL 6SLL
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#
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# Some imx6 chips have Cortex-A7 or an Cortex-M and need special handling
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#
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME imx6
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}
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# CoreSight Debug Access Port
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if { [info exists DAP_TAPID] } {
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set _DAP_TAPID $DAP_TAPID
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} else {
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set _DAP_TAPID 0x4ba00477
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}
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x01 -irmask 0x0f \
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-expected-id $_DAP_TAPID
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# SDMA / no IDCODE
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jtag newtap $_CHIPNAME sdma -irlen 4 -ircapture 0x00 -irmask 0x0f
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# System JTAG Controller
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# List supported SJC TAPIDs from imx reference manuals:
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set _SJC_TAPID_6Q 0x0191c01d
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set _SJC_TAPID_6D 0x0191e01d
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set _SJC_TAPID_6QP 0x3191c01d
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set _SJC_TAPID_6DP 0x3191d01d
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set _SJC_TAPID_6DL 0x0891a01d
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set _SJC_TAPID_6S 0x0891b01d
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set _SJC_TAPID_6SL 0x0891f01d
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set _SJC_TAPID_6SLL 0x088c201d
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# Allow external override of the first SJC TAPID
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if { [info exists SJC_TAPID] } {
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set _SJC_TAPID $SJC_TAPID
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} else {
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set _SJC_TAPID $_SJC_TAPID_6Q
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}
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jtag newtap $_CHIPNAME sjc -irlen 5 -ircapture 0x01 -irmask 0x1f \
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-ignore-version \
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-expected-id $_SJC_TAPID \
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-expected-id $_SJC_TAPID_6QP \
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-expected-id $_SJC_TAPID_6DP \
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-expected-id $_SJC_TAPID_6D \
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-expected-id $_SJC_TAPID_6DL \
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-expected-id $_SJC_TAPID_6S \
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-expected-id $_SJC_TAPID_6SL \
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-expected-id $_SJC_TAPID_6SLL
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# GDB target: Cortex-A9, using DAP, configuring only one core
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# Base addresses of cores:
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# core 0 - 0x82150000
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# core 1 - 0x82152000
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# core 2 - 0x82154000
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# core 3 - 0x82156000
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set _TARGETNAME $_CHIPNAME.cpu.0
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dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
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target create $_TARGETNAME cortex_a -dap $_CHIPNAME.dap \
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-coreid 0 -dbgbase 0x82150000
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# some TCK cycles are required to activate the DEBUG power domain
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jtag configure $_CHIPNAME.sjc -event post-reset "runtest 100"
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proc imx6_dbginit {target} {
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# General Cortex-A8/A9 debug initialisation
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cortex_a dbginit
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}
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# Slow speed to be sure it will work
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adapter speed 1000
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$_TARGETNAME configure -event reset-start { adapter speed 1000 }
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$_TARGETNAME configure -event reset-assert-post "imx6_dbginit $_TARGETNAME"
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