d1cd97777b
Atmel introduced 6 new Cortex-M4 processors on 2011-10-26 SAM4S16C - 1024KB flash LQFP100/BGA100 SAM4S16B - 1024KB flash LQFP64/QFN64 SAM4S16A - 1024KB flash LQFP48/QFN48 SAM4S8C - 512KB flash LQFP100/BGA100 SAM4S8B - 512KB flash LQFP64/QFN64 SAM4S8A - 512KB flash LQFP48/QFN48 The SAM4S processors still suffer from the "6 waitstates needed to program device" errata. Other relevant changes are: 1. Address of flash memory starts at 0x400000. 2. EWP (Erase page and write page) only works for the first two 8KB "sectors" 3. Because of the EWP not working for all the sectors, normal page writes have to be used. The default_flash_blank_check is used to check if lockregions should be erased. 4. The EA (Erase All) command takes 7.3s to complete. (Previous timeout was 500 ms) 5. There are 128 lockable regions of 8KB each. Implemented default blank checking, and page erase for load_image scenarios. This is to compensate for the EWP flash commands only working on the first 2 8KB sectors. Change-Id: I7c5a52b177f7849a107611fd0f635fc416cfb724 Signed-off-by: Olivier Schonken <olivier.schonken@gmail.com> Reviewed-on: http://openocd.zylin.com/528 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
46 lines
1.2 KiB
INI
46 lines
1.2 KiB
INI
# script for ATMEL sam4, a CORTEX-M4 chip
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#
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME sam4
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}
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if { [info exists ENDIAN] } {
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set _ENDIAN $ENDIAN
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} else {
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set _ENDIAN little
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}
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# JTAG speed should be <= F_CPU/6. F_CPU after reset is 4 MHz, so use F_JTAG = 0.5MHz
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#
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# Since we may be running of an RC oscilator, we crank down the speed a
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# bit more to be on the safe side. Perhaps superstition, but if are
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# running off a crystal, we can run closer to the limit. Note
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# that there can be a pretty wide band where things are more or less stable.
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adapter_khz 500
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adapter_nsrst_delay 100
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jtag_ntrst_delay 100
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#jtag scan chain
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if { [info exists CPUTAPID] } {
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set _CPUTAPID $CPUTAPID
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} else {
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set _CPUTAPID 0x4ba00477
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}
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME cortex_m3 -endian $_ENDIAN -chain-position $_TARGETNAME
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# 16K is plenty, the smallest chip has this much
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$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size 16384 -work-area-backup 0
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$_TARGETNAME configure -event gdb-flash-erase-start {
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halt
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}
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