8a6d4ced4c
Teach the "armv4_5" register code to understand about the secure monitor mode: - Add the other three shadowed registers to the arrays - Support another internal mode number (sigh) in mappings - Catch malloc/calloc failures building that register cache This should kick in for Cortex-A8 and ARM1176. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> |
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flash | ||
helper | ||
jtag | ||
pld | ||
server | ||
svf | ||
target | ||
xsvf | ||
ecosboard.c | ||
hello.c | ||
main.c | ||
Makefile.am | ||
openocd.c | ||
openocd.h |