312 lines
11 KiB
C
312 lines
11 KiB
C
/***************************************************************************
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* Copyright (C) 2013 by Franck Jullien *
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* elec4fun@gmail.com *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; either version 2 of the License, or *
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* (at your option) any later version. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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* *
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* You should have received a copy of the GNU General Public License *
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* along with this program; if not, write to the *
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* Free Software Foundation, Inc., *
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* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
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***************************************************************************/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include "or1k_tap.h"
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#include "or1k.h"
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#include <jtag/jtag.h>
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/* Contains constants relevant to the Altera Virtual JTAG
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* device, which are not included in the BSDL.
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* As of this writing, these are constant across every
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* device which supports virtual JTAG.
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*/
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/* These are commands for the FPGA's IR. */
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#define ALTERA_CYCLONE_CMD_USER1 0x0E
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#define ALTERA_CYCLONE_CMD_USER0 0x0C
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/* These defines are for the virtual IR (not the FPGA's)
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* The virtual TAP was defined in hardware to match the OpenCores native
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* TAP in both IR size and DEBUG command.
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*/
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#define ALT_VJTAG_IR_SIZE 4
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#define ALT_VJTAG_CMD_DEBUG 0x8
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/* SLD node ID. */
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#define JTAG_TO_AVALON_NODE_ID 0x84
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#define VJTAG_NODE_ID 0x08
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#define SIGNAL_TAP_NODE_ID 0x00
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#define SERIAL_FLASH_LOADER_NODE_ID 0x04
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#define VER(x) ((x >> 27) & 0x1f)
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#define NB_NODES(x) ((x >> 19) & 0xff)
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#define ID(x) ((x >> 19) & 0xff)
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#define MANUF(x) ((x >> 8) & 0x7ff)
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#define M_WIDTH(x) ((x >> 0) & 0xff)
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#define INST_ID(x) ((x >> 0) & 0xff)
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/* tap instructions - Mohor JTAG TAP */
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#define OR1K_TAP_INST_IDCODE 0x2
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#define OR1K_TAP_INST_DEBUG 0x8
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static char *id_to_string(unsigned char id)
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{
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switch (id) {
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case VJTAG_NODE_ID:
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return "Virtual JTAG";
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case JTAG_TO_AVALON_NODE_ID:
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return "JTAG to avalon bridge";
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case SIGNAL_TAP_NODE_ID:
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return "Signal TAP";
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case SERIAL_FLASH_LOADER_NODE_ID:
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return "Serial Flash Loader";
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}
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return "unknown";
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}
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static unsigned char guess_addr_width(unsigned char number_of_nodes)
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{
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unsigned char width = 0;
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while (number_of_nodes) {
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number_of_nodes >>= 1;
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width++;
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}
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return width;
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}
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static int or1k_tap_vjtag_init(struct or1k_jtag *jtag_info)
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{
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LOG_DEBUG("Initialising Altera Virtual JTAG TAP");
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/* Put TAP into state where it can talk to the debug interface
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* by shifting in correct value to IR.
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*/
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/* Ensure TAP is reset - maybe not necessary*/
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jtag_add_tlr();
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/* You can use a custom JTAG controller to discover transactions
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* necessary to enumerate all Virtual JTAG megafunction instances
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* from your design atruntime. All SLD nodes and the virtual JTAG
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* registers that they contain are targeted by two Instruction Register
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* values, USER0 and USER1.
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*
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* The USER1 instruction targets the virtual IR of either the sld_hub
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* or a SLD node. That is,when the USER1 instruction is issued to
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* the device, the subsequent DR scans target a specific virtual
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* IR chain based on an address field contained within the DR scan.
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* The table below shows how the virtual IR, the DR target of the
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* USER1 instruction is interpreted.
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*
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* The VIR_VALUE in the table below is the virtual IR value for the
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* target SLD node. The width of this field is m bits in length,
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* where m is the length of the largest VIR for all of the SLD nodes
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* in the design. All SLD nodes with VIR lengths of fewer than m
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* bits must pad VIR_VALUE with zeros up to a length of m.
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*
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* -------------------------------+-------------------------------
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* m + n - 1 m | m -1 0
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* -------------------------------+-------------------------------
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* ADDR [(n – 1)..0] | VIR_VALUE [(m – 1)..0]
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* -------------------------------+-------------------------------
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*
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* The ADDR bits act as address values to signal the active SLD node
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* that the virtual IR shift targets. ADDR is n bits in length, where
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* n bits must be long enough to encode all SLD nodes within the design,
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* as shown below.
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*
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* n = CEIL(log2(Number of SLD_nodes +1))
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*
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* The SLD hub is always 0 in the address map.
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*
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* Discovery and enumeration of the SLD instances within a design
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* requires interrogation of the sld_hub to determine the dimensions
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* of the USER1 DR (m and n) and associating each SLD instance, specifically
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* the Virtual JTAG megafunction instances, with an address value
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* contained within the ADDR bits of the USER1 DR.
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*
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* The SLD hub contains the HUB IP Configuration Register and SLD_NODE_INFO
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* register for each SLD node in the design. The HUB IP configuration register provides
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* information needed to determine the dimensions of the USER1 DR chain. The
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* SLD_NODE_INFO register is used to determine the address mapping for Virtual
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* JTAG instance in your design. This register set is shifted out by issuing the
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* HUB_INFO instruction. Both the ADDR bits for the SLD hub and the HUB_INFO
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* instruction is 0 × 0.
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* Because m and n are unknown at this point, the DR register
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* (ADDR bits + VIR_VALUE) must be filled with zeros. Shifting a sequence of 64 zeroes
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* into the USER1 DR is sufficient to cover the most conservative case for m and n.
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*/
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uint8_t t[4];
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struct scan_field field;
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struct jtag_tap *tap = jtag_info->tap;
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/* Select VIR */
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buf_set_u32(t, 0, tap->ir_length, ALTERA_CYCLONE_CMD_USER1);
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field.num_bits = tap->ir_length;
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field.out_value = t;
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field.in_value = NULL;
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jtag_add_ir_scan(tap, &field, TAP_IDLE);
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/* Select the SLD Hub */
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field.num_bits = 64;
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field.out_value = NULL;
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field.in_value = NULL;
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jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
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/* HUB IP Configuration Register
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*
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* When the USER1 and HUB_INFO instruction sequence is issued, the
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* USER0 instruction must be applied to enable the target register
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* of the HUB_INFO instruction. The HUB IP configuration register
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* is shifted out using eight four-bit nibble scans of the DR register.
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* Each four-bit scan must pass through the UPDATE_DR state before
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* the next four-bit scan. The 8 scans are assembled into a 32-bit
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* value with the definitions shown in the table below.
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*
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* --------------------------------------------------------------------------------
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* NIBBLE7 | NIBBLE6 | NIBBLE5 | NIBBLE4 | NIBBLE3 | NIBBLE2 | NIBBLE1 | NIBBLE0
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* ----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+-----
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* | | | | | | | | | | | | | | |
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* ----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+-----
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* HUB IP version| N | ALTERA_MFG_ID (0x06E) | SUM (m, n)
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* --------------+-------------------+------------------------+--------------------
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*/
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/* Select VDR */
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buf_set_u32(t, 0, tap->ir_length, ALTERA_CYCLONE_CMD_USER0);
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field.num_bits = tap->ir_length;
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field.out_value = t;
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field.in_value = NULL;
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jtag_add_ir_scan(tap, &field, TAP_IDLE);
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int retval = jtag_execute_queue();
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if (retval != ERROR_OK)
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return retval;
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uint8_t nibble;
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uint32_t hub_info = 0;
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for (int i = 0; i < 8; i++) {
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field.num_bits = 4;
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field.out_value = NULL;
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field.in_value = &nibble;
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jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
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retval = jtag_execute_queue();
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if (retval != ERROR_OK)
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return retval;
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hub_info = ((hub_info >> 4) | ((nibble & 0xf) << 28));
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}
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int nb_nodes = NB_NODES(hub_info);
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int m_width = M_WIDTH(hub_info);
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LOG_DEBUG("SLD HUB Configuration register");
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LOG_DEBUG("------------------------------");
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LOG_DEBUG("m_width = %d", m_width);
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LOG_DEBUG("manufacturer_id = 0x%02" PRIx32, MANUF(hub_info));
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LOG_DEBUG("nb_of_node = %d", nb_nodes);
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LOG_DEBUG("version = %" PRId32, VER(hub_info));
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LOG_DEBUG("VIR length = %d", guess_addr_width(nb_nodes) + m_width);
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/* Because the number of SLD nodes is now known, the Nodes on the hub can be
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* enumerated by repeating the 8 four-bit nibble scans, once for each Node,
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* to yield the SLD_NODE_INFO register of each Node. The DR nibble shifts
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* are a continuation of the HUB_INFO DR shift used to shift out the Hub IP
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* Configuration register.
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*
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* The order of the Nodes as they are shifted out determines the ADDR
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* values for the Nodes, beginning with, for the first Node SLD_NODE_INFO
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* shifted out, up to and including, for the last node on the hub. The
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* tables below show the SLD_NODE_INFO register and a their functional descriptions.
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*
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* --------------+-----------+---------------+----------------
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* 31 27 | 26 19 | 18 8 | 7 0
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* --------------+-----------+---------------+----------------
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* Node Version | NODE ID | NODE MFG_ID | NODE INST ID
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*
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*/
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int vjtag_node_address = -1;
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int node_index;
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uint32_t node_info = 0;
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for (node_index = 0; node_index < nb_nodes; node_index++) {
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for (int i = 0; i < 8; i++) {
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field.num_bits = 4;
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field.out_value = NULL;
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field.in_value = &nibble;
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jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
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retval = jtag_execute_queue();
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if (retval != ERROR_OK)
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return retval;
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node_info = ((node_info >> 4) | ((nibble & 0xf) << 28));
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}
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LOG_DEBUG("Node info register");
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LOG_DEBUG("--------------------");
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LOG_DEBUG("instance_id = %" PRId32, ID(node_info));
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LOG_DEBUG("manufacturer_id = 0x%02" PRIx32, MANUF(node_info));
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LOG_DEBUG("node_id = %" PRId32 " (%s)", ID(node_info),
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id_to_string(ID(node_info)));
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LOG_DEBUG("version = %" PRId32, VER(node_info));
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if (ID(node_info) == VJTAG_NODE_ID)
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vjtag_node_address = node_index + 1;
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}
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if (vjtag_node_address < 0) {
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LOG_ERROR("No VJTAG TAP instance found !");
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return ERROR_FAIL;
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}
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/* Select VIR */
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buf_set_u32(t, 0, tap->ir_length, ALTERA_CYCLONE_CMD_USER1);
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field.num_bits = tap->ir_length;
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field.out_value = t;
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field.in_value = NULL;
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jtag_add_ir_scan(tap, &field, TAP_IDLE);
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/* Send the DEBUG command to the VJTAG IR */
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int dr_length = guess_addr_width(nb_nodes) + m_width;
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buf_set_u32(t, 0, dr_length, (vjtag_node_address << m_width) | ALT_VJTAG_CMD_DEBUG);
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field.num_bits = dr_length;
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field.out_value = t;
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field.in_value = NULL;
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jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
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/* Select the VJTAG DR */
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buf_set_u32(t, 0, tap->ir_length, ALTERA_CYCLONE_CMD_USER0);
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field.num_bits = tap->ir_length;
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field.out_value = t;
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field.in_value = NULL;
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jtag_add_ir_scan(tap, &field, TAP_IDLE);
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return jtag_execute_queue();
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}
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static struct or1k_tap_ip vjtag_tap = {
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.name = "vjtag",
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.init = or1k_tap_vjtag_init,
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};
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int or1k_tap_vjtag_register(void)
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{
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list_add_tail(&vjtag_tap.list, &tap_list);
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return 0;
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}
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