35f284fe7c
* Move more smarts into the target algorithm code, and rewrite that in C so it's easier to understand/maintain. * Support >24-bit addresses. * Check for errors. Change-Id: I3b1a143589fe6defafb8f95820aa682acc9646e7 Signed-off-by: Tim Newsome <tim@sifive.com> Reviewed-on: https://review.openocd.org/c/openocd/+/6679 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
23 lines
329 B
ArmAsm
23 lines
329 B
ArmAsm
#if __riscv_xlen == 64
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# define LREG ld
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# define SREG sd
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# define REGBYTES 8
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#else
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# define LREG lw
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# define SREG sw
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# define REGBYTES 4
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#endif
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.section .text.entry
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.global _start
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_start:
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lla sp, stack_end
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jal flash_fespi
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ebreak
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.section .data
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.balign REGBYTES
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stack:
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.fill 16, REGBYTES, 0x8675309
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stack_end:
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