49af0788e9
This is needed for configs that might be used with the cheapest STM32F100 parts that have only 4kB SRAM. Restrictions for the other STM32 families are verified to be set appropriately. Change-Id: I1ad2370435015604db9f27c1a76c153480311a28 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/1378 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
82 lines
2.2 KiB
INI
82 lines
2.2 KiB
INI
# script for stm32f1x family
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME stm32f1x
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}
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if { [info exists ENDIAN] } {
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set _ENDIAN $ENDIAN
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} else {
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set _ENDIAN little
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}
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# Work-area is a space in RAM used for flash programming
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# By default use 4kB (as found on some STM32F100s)
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if { [info exists WORKAREASIZE] } {
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set _WORKAREASIZE $WORKAREASIZE
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} else {
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set _WORKAREASIZE 0x1000
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}
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# JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
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adapter_khz 1000
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adapter_nsrst_delay 100
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jtag_ntrst_delay 100
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#jtag scan chain
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if { [info exists CPUTAPID] } {
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set _CPUTAPID $CPUTAPID
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} else {
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# See STM Document RM0008
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# Section 26.6.3
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set _CPUTAPID 0x3ba00477
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}
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jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
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if { [info exists BSTAPID] } {
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# FIXME this never gets used to override defaults...
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set _BSTAPID $BSTAPID
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} else {
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# See STM Document RM0008
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# Section 29.6.2
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# Low density devices, Rev A
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set _BSTAPID1 0x06412041
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# Medium density devices, Rev A
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set _BSTAPID2 0x06410041
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# Medium density devices, Rev B and Rev Z
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set _BSTAPID3 0x16410041
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set _BSTAPID4 0x06420041
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# High density devices, Rev A
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set _BSTAPID5 0x06414041
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# Connectivity line devices, Rev A and Rev Z
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set _BSTAPID6 0x06418041
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# XL line devices, Rev A
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set _BSTAPID7 0x06430041
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# VL line devices, Rev A and Z In medium-density and high-density value line devices
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set _BSTAPID8 0x06420041
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# VL line devices, Rev A
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set _BSTAPID9 0x06428041
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}
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jtag newtap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID1 \
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-expected-id $_BSTAPID2 -expected-id $_BSTAPID3 \
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-expected-id $_BSTAPID4 -expected-id $_BSTAPID5 \
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-expected-id $_BSTAPID6 -expected-id $_BSTAPID7 \
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-expected-id $_BSTAPID8 -expected-id $_BSTAPID9
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
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$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
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# flash size will be probed
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set _FLASHNAME $_CHIPNAME.flash
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flash bank $_FLASHNAME stm32f1x 0x08000000 0 0 0 $_TARGETNAME
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# if srst is not fitted use SYSRESETREQ to
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# perform a soft reset
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cortex_m reset_config sysresetreq
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