65 lines
1.7 KiB
INI
65 lines
1.7 KiB
INI
# script for stm32f2x family
|
|
|
|
if { [info exists CHIPNAME] } {
|
|
set _CHIPNAME $CHIPNAME
|
|
} else {
|
|
set _CHIPNAME stm32f2x
|
|
}
|
|
|
|
if { [info exists ENDIAN] } {
|
|
set _ENDIAN $ENDIAN
|
|
} else {
|
|
set _ENDIAN little
|
|
}
|
|
|
|
# Work-area is a space in RAM used for flash programming
|
|
# By default use 64kB
|
|
if { [info exists WORKAREASIZE] } {
|
|
set _WORKAREASIZE $WORKAREASIZE
|
|
} else {
|
|
set _WORKAREASIZE 0x10000
|
|
}
|
|
|
|
# JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
|
|
#
|
|
# Since we may be running of an RC oscilator, we crank down the speed a
|
|
# bit more to be on the safe side. Perhaps superstition, but if are
|
|
# running off a crystal, we can run closer to the limit. Note
|
|
# that there can be a pretty wide band where things are more or less stable.
|
|
adapter_khz 1000
|
|
|
|
adapter_nsrst_delay 100
|
|
jtag_ntrst_delay 100
|
|
|
|
#jtag scan chain
|
|
if { [info exists CPUTAPID] } {
|
|
set _CPUTAPID $CPUTAPID
|
|
} else {
|
|
# See STM Document RM0033
|
|
# Section 32.6.3 - corresponds to Cortex-M3 r2p0
|
|
set _CPUTAPID 0x4ba00477
|
|
}
|
|
jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_CPUTAPID
|
|
|
|
if { [info exists BSTAPID] } {
|
|
set _BSTAPID $BSTAPID
|
|
} else {
|
|
# See STM Document RM0033
|
|
# Section 32.6.2
|
|
#
|
|
set _BSTAPID 0x06411041
|
|
}
|
|
jtag newtap $_CHIPNAME bs -irlen 5 -expected-id $_BSTAPID
|
|
|
|
set _TARGETNAME $_CHIPNAME.cpu
|
|
target create $_TARGETNAME cortex_m -endian $_ENDIAN -chain-position $_TARGETNAME
|
|
|
|
$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0
|
|
|
|
set _FLASHNAME $_CHIPNAME.flash
|
|
flash bank $_FLASHNAME stm32f2x 0 0 0 0 $_TARGETNAME
|
|
|
|
# if srst is not fitted use SYSRESETREQ to
|
|
# perform a soft reset
|
|
cortex_m reset_config sysresetreq
|