83 lines
3.1 KiB
C
83 lines
3.1 KiB
C
/***************************************************************************
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* Copyright (C) 2015 by Uwe Bonnes *
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* bon@elektron.ikp.physik.tu-darmstadt.de *
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*
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; either version 2 of the License, or *
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* (at your option) any later version. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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* *
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* You should have received a copy of the GNU General Public License *
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* along with this program. If not, see <http://www.gnu.org/licenses/>. *
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***************************************************************************/
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#ifndef OPENOCD_FLASH_NOR_STM32L4X
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#define OPENOCD_FLASH_NOR_STM32L4X
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/* Flash registers offsets */
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#define STM32_FLASH_ACR 0x00
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#define STM32_FLASH_KEYR 0x08
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#define STM32_FLASH_OPTKEYR 0x0c
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#define STM32_FLASH_SR 0x10
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#define STM32_FLASH_CR 0x14
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#define STM32_FLASH_OPTR 0x20
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#define STM32_FLASH_WRP1AR 0x2c
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#define STM32_FLASH_WRP1BR 0x30
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#define STM32_FLASH_WRP2AR 0x4c
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#define STM32_FLASH_WRP2BR 0x50
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/* FLASH_CR register bits */
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#define FLASH_PG (1 << 0)
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#define FLASH_PER (1 << 1)
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#define FLASH_MER1 (1 << 2)
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#define FLASH_PAGE_SHIFT 3
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#define FLASH_CR_BKER (1 << 11)
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#define FLASH_MER2 (1 << 15)
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#define FLASH_STRT (1 << 16)
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#define FLASH_OPTSTRT (1 << 17)
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#define FLASH_EOPIE (1 << 24)
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#define FLASH_ERRIE (1 << 25)
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#define FLASH_OBL_LAUNCH (1 << 27)
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#define FLASH_OPTLOCK (1 << 30)
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#define FLASH_LOCK (1 << 31)
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/* FLASH_SR register bits */
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#define FLASH_BSY (1 << 16)
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/* Fast programming not used => related errors not used*/
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#define FLASH_PGSERR (1 << 7) /* Programming sequence error */
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#define FLASH_SIZERR (1 << 6) /* Size error */
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#define FLASH_PGAERR (1 << 5) /* Programming alignment error */
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#define FLASH_WRPERR (1 << 4) /* Write protection error */
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#define FLASH_PROGERR (1 << 3) /* Programming error */
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#define FLASH_OPERR (1 << 1) /* Operation error */
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#define FLASH_EOP (1 << 0) /* End of operation */
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#define FLASH_ERROR (FLASH_PGSERR | FLASH_SIZERR | FLASH_PGAERR | \
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FLASH_WRPERR | FLASH_PROGERR | FLASH_OPERR)
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/* register unlock keys */
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#define KEY1 0x45670123
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#define KEY2 0xCDEF89AB
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/* option register unlock key */
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#define OPTKEY1 0x08192A3B
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#define OPTKEY2 0x4C5D6E7F
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#define RDP_LEVEL_0 0xAA
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#define RDP_LEVEL_1 0xBB
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#define RDP_LEVEL_2 0xCC
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/* other registers */
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#define DBGMCU_IDCODE_G0 0x40015800
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#define DBGMCU_IDCODE_L4_G4 0xE0042000
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#define DBGMCU_IDCODE_L5 0xE0044000
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#define STM32_FLASH_BANK_BASE 0x08000000
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#endif
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