openocd/tcl/board/arty_s7.cfg
Marc Schink 3359419e6a tcl/board/arty_s7: Fix proc and chip name
Tested with Digilent Arty S7 board.

Change-Id: I064f3b6537ae8d765d7f380ad53b922d584fdbe7
Signed-off-by: Marc Schink <dev@zapb.de>
Reviewed-on: https://review.openocd.org/c/openocd/+/6509
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
2021-09-04 07:23:58 +00:00

36 lines
1.0 KiB
INI

#
# Arty S7: Spartan7 25/50 FPGA Board for Makers and Hobbyists
#
# https://www.xilinx.com/products/boards-and-kits/1-pnziih.html
# https://store.digilentinc.com/arty-s7-spartan-7-fpga-board-for-makers-and-hobbyists/
source [find interface/ftdi/digilent-hs1.cfg]
# Xilinx Spartan7-25/50 FPGA (XC7S{25,50}-CSGA324)
source [find cpld/xilinx-xc7.cfg]
source [find cpld/jtagspi.cfg]
adapter speed 25000
# Usage:
#
# Load Bitstream into FPGA:
# openocd -f board/arty_s7.cfg -c "init;\
# pld load 0 bitstream.bit;\
# shutdown"
#
# Write Bitstream to Flash:
# openocd -f board/arty_s7.cfg -c "init;\
# jtagspi_init 0 bscan_spi_xc7s??.bit;\
# jtagspi_program bitstream.bin 0;\
# xc7_program xc7.tap;\
# shutdown"
#
# jtagspi flash proxies can be found at:
# https://github.com/quartiq/bscan_spi_bitstreams
#
# For the Spartan 50 variant, use
# - https://github.com/quartiq/bscan_spi_bitstreams/raw/master/bscan_spi_xc7s50.bit
# For the Spartan 25 variant, use
# - https://github.com/quartiq/bscan_spi_bitstreams/raw/master/bscan_spi_xc7s25.bit