32 lines
1.1 KiB
C
32 lines
1.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/***************************************************************************
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* ESP32 target for OpenOCD *
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* Copyright (C) 2017 Espressif Systems Ltd. *
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***************************************************************************/
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#ifndef OPENOCD_TARGET_ESP32_H
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#define OPENOCD_TARGET_ESP32_H
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#include <target/xtensa/xtensa_regs.h>
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#define ESP32_DROM_LOW 0x3F400000
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#define ESP32_DROM_HIGH 0x3F800000
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#define ESP32_IROM_LOW 0x400D0000
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#define ESP32_IROM_HIGH 0x40400000
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/* Number of registers returned directly by the G command
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* Corresponds to the amount of regs listed in regformats/reg-xtensa.dat in the gdb source */
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#define ESP32_NUM_REGS_G_COMMAND 105
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enum esp32_reg_id {
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/* chip specific registers that extend ISA go after ISA-defined ones */
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ESP32_REG_IDX_EXPSTATE = XT_USR_REG_START,
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ESP32_REG_IDX_F64R_LO,
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ESP32_REG_IDX_F64R_HI,
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ESP32_REG_IDX_F64S,
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ESP32_NUM_REGS,
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};
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#endif /* OPENOCD_TARGET_ESP32_H */
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