365 lines
9.8 KiB
C
365 lines
9.8 KiB
C
/***************************************************************************
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* Copyright (C) 2008 by Spencer Oliver *
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* spen@spen-soft.co.uk *
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* *
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* Copyright (C) 2008 by David T.L. Wong *
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* *
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* Copyright (C) 2009 by David N. Claffey <dnclaffey@gmail.com> *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; either version 2 of the License, or *
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* (at your option) any later version. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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* *
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* You should have received a copy of the GNU General Public License *
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* along with this program; if not, write to the *
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* Free Software Foundation, Inc., *
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* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
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***************************************************************************/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include "mips32.h"
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#include "mips_ejtag.h"
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void mips_ejtag_set_instr(struct mips_ejtag *ejtag_info, int new_instr)
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{
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struct jtag_tap *tap;
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tap = ejtag_info->tap;
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assert(tap != NULL);
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if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) != (uint32_t)new_instr) {
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struct scan_field field;
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uint8_t t[4];
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field.num_bits = tap->ir_length;
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field.out_value = t;
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buf_set_u32(t, 0, field.num_bits, new_instr);
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field.in_value = NULL;
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jtag_add_ir_scan(tap, &field, TAP_IDLE);
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}
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}
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int mips_ejtag_get_idcode(struct mips_ejtag *ejtag_info, uint32_t *idcode)
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{
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struct scan_field field;
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uint8_t r[4];
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mips_ejtag_set_instr(ejtag_info, EJTAG_INST_IDCODE);
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field.num_bits = 32;
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field.out_value = NULL;
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field.in_value = r;
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jtag_add_dr_scan(ejtag_info->tap, 1, &field, TAP_IDLE);
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int retval;
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retval = jtag_execute_queue();
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if (retval != ERROR_OK) {
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LOG_ERROR("register read failed");
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return retval;
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}
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*idcode = buf_get_u32(field.in_value, 0, 32);
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return ERROR_OK;
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}
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static int mips_ejtag_get_impcode(struct mips_ejtag *ejtag_info, uint32_t *impcode)
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{
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struct scan_field field;
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uint8_t r[4];
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mips_ejtag_set_instr(ejtag_info, EJTAG_INST_IMPCODE);
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field.num_bits = 32;
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field.out_value = NULL;
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field.in_value = r;
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jtag_add_dr_scan(ejtag_info->tap, 1, &field, TAP_IDLE);
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int retval;
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retval = jtag_execute_queue();
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if (retval != ERROR_OK) {
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LOG_ERROR("register read failed");
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return retval;
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}
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*impcode = buf_get_u32(field.in_value, 0, 32);
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return ERROR_OK;
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}
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void mips_ejtag_add_scan_96(struct mips_ejtag *ejtag_info, uint32_t ctrl, uint32_t data, uint8_t *in_scan_buf)
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{
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assert(ejtag_info->tap != NULL);
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struct jtag_tap *tap = ejtag_info->tap;
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struct scan_field field;
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uint8_t out_scan[12];
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/* processor access "all" register 96 bit */
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field.num_bits = 96;
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field.out_value = out_scan;
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buf_set_u32(out_scan, 0, 32, ctrl);
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buf_set_u32(out_scan + 4, 0, 32, data);
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buf_set_u32(out_scan + 8, 0, 32, 0);
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field.in_value = in_scan_buf;
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jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
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keep_alive();
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}
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int mips_ejtag_drscan_32(struct mips_ejtag *ejtag_info, uint32_t *data)
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{
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struct jtag_tap *tap;
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tap = ejtag_info->tap;
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assert(tap != NULL);
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struct scan_field field;
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uint8_t t[4], r[4];
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int retval;
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field.num_bits = 32;
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field.out_value = t;
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buf_set_u32(t, 0, field.num_bits, *data);
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field.in_value = r;
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jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
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retval = jtag_execute_queue();
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if (retval != ERROR_OK) {
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LOG_ERROR("register read failed");
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return retval;
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}
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*data = buf_get_u32(field.in_value, 0, 32);
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keep_alive();
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return ERROR_OK;
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}
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void mips_ejtag_drscan_32_out(struct mips_ejtag *ejtag_info, uint32_t data)
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{
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uint8_t t[4];
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struct jtag_tap *tap;
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tap = ejtag_info->tap;
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assert(tap != NULL);
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struct scan_field field;
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field.num_bits = 32;
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field.out_value = t;
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buf_set_u32(t, 0, field.num_bits, data);
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field.in_value = NULL;
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jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
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}
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int mips_ejtag_drscan_8(struct mips_ejtag *ejtag_info, uint32_t *data)
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{
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struct jtag_tap *tap;
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tap = ejtag_info->tap;
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assert(tap != NULL);
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struct scan_field field;
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uint8_t t[4] = {0, 0, 0, 0}, r[4];
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int retval;
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field.num_bits = 8;
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field.out_value = t;
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buf_set_u32(t, 0, field.num_bits, *data);
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field.in_value = r;
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jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
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retval = jtag_execute_queue();
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if (retval != ERROR_OK) {
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LOG_ERROR("register read failed");
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return retval;
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}
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*data = buf_get_u32(field.in_value, 0, 32);
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return ERROR_OK;
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}
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void mips_ejtag_drscan_8_out(struct mips_ejtag *ejtag_info, uint8_t data)
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{
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struct jtag_tap *tap;
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tap = ejtag_info->tap;
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assert(tap != NULL);
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struct scan_field field;
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field.num_bits = 8;
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field.out_value = &data;
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field.in_value = NULL;
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jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
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}
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/* Set (to enable) or clear (to disable stepping) the SSt bit (bit 8) in Cp0 Debug reg (reg 23, sel 0) */
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int mips_ejtag_config_step(struct mips_ejtag *ejtag_info, int enable_step)
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{
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struct pracc_queue_info ctx = {.max_code = 7};
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pracc_queue_init(&ctx);
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if (ctx.retval != ERROR_OK)
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goto exit;
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pracc_add(&ctx, 0, MIPS32_MFC0(8, 23, 0)); /* move COP0 Debug to $8 */
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pracc_add(&ctx, 0, MIPS32_ORI(8, 8, 0x0100)); /* set SSt bit in debug reg */
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if (!enable_step)
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pracc_add(&ctx, 0, MIPS32_XORI(8, 8, 0x0100)); /* clear SSt bit in debug reg */
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pracc_add(&ctx, 0, MIPS32_MTC0(8, 23, 0)); /* move $8 to COP0 Debug */
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pracc_add(&ctx, 0, MIPS32_LUI(8, UPPER16(ejtag_info->reg8))); /* restore upper 16 bits of $8 */
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pracc_add(&ctx, 0, MIPS32_B(NEG16((ctx.code_count + 1)))); /* jump to start */
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pracc_add(&ctx, 0, MIPS32_ORI(8, 8, LOWER16(ejtag_info->reg8))); /* restore lower 16 bits of $8 */
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ctx.retval = mips32_pracc_queue_exec(ejtag_info, &ctx, NULL);
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exit:
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pracc_queue_free(&ctx);
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return ctx.retval;
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}
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int mips_ejtag_enter_debug(struct mips_ejtag *ejtag_info)
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{
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uint32_t ejtag_ctrl;
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mips_ejtag_set_instr(ejtag_info, EJTAG_INST_CONTROL);
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/* set debug break bit */
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ejtag_ctrl = ejtag_info->ejtag_ctrl | EJTAG_CTRL_JTAGBRK;
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mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
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/* break bit will be cleared by hardware */
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ejtag_ctrl = ejtag_info->ejtag_ctrl;
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mips_ejtag_drscan_32(ejtag_info, &ejtag_ctrl);
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LOG_DEBUG("ejtag_ctrl: 0x%8.8" PRIx32 "", ejtag_ctrl);
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if ((ejtag_ctrl & EJTAG_CTRL_BRKST) == 0) {
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LOG_ERROR("Failed to enter Debug Mode!");
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return ERROR_FAIL;
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}
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return ERROR_OK;
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}
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int mips_ejtag_exit_debug(struct mips_ejtag *ejtag_info)
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{
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uint32_t instr = MIPS32_DRET;
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struct pracc_queue_info ctx = {.max_code = 1, .pracc_list = &instr, .code_count = 1, .store_count = 0};
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/* execute our dret instruction */
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ctx.retval = mips32_pracc_queue_exec(ejtag_info, &ctx, NULL);
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/* pic32mx workaround, false pending at low core clock */
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jtag_add_sleep(1000);
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return ctx.retval;
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}
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int mips_ejtag_init(struct mips_ejtag *ejtag_info)
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{
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uint32_t ejtag_version;
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int retval;
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retval = mips_ejtag_get_impcode(ejtag_info, &ejtag_info->impcode);
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if (retval != ERROR_OK)
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return retval;
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LOG_DEBUG("impcode: 0x%8.8" PRIx32 "", ejtag_info->impcode);
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/* get ejtag version */
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ejtag_version = ((ejtag_info->impcode >> 29) & 0x07);
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switch (ejtag_version) {
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case 0:
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LOG_DEBUG("EJTAG: Version 1 or 2.0 Detected");
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break;
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case 1:
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LOG_DEBUG("EJTAG: Version 2.5 Detected");
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break;
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case 2:
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LOG_DEBUG("EJTAG: Version 2.6 Detected");
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break;
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case 3:
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LOG_DEBUG("EJTAG: Version 3.1 Detected");
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break;
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case 4:
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LOG_DEBUG("EJTAG: Version 4.1 Detected");
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break;
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case 5:
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LOG_DEBUG("EJTAG: Version 5.1 Detected");
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break;
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default:
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LOG_DEBUG("EJTAG: Unknown Version Detected");
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break;
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}
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LOG_DEBUG("EJTAG: features:%s%s%s%s%s%s%s",
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ejtag_info->impcode & EJTAG_IMP_R3K ? " R3k" : " R4k",
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ejtag_info->impcode & EJTAG_IMP_DINT ? " DINT" : "",
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ejtag_info->impcode & (1 << 22) ? " ASID_8" : "",
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ejtag_info->impcode & (1 << 21) ? " ASID_6" : "",
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ejtag_info->impcode & EJTAG_IMP_MIPS16 ? " MIPS16" : "",
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ejtag_info->impcode & EJTAG_IMP_NODMA ? " noDMA" : " DMA",
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ejtag_info->impcode & EJTAG_DCR_MIPS64 ? " MIPS64" : " MIPS32");
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if ((ejtag_info->impcode & EJTAG_IMP_NODMA) == 0)
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LOG_DEBUG("EJTAG: DMA Access Mode Support Enabled");
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/* set initial state for ejtag control reg */
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ejtag_info->ejtag_ctrl = EJTAG_CTRL_ROCC | EJTAG_CTRL_PRACC | EJTAG_CTRL_PROBEN | EJTAG_CTRL_SETDEV;
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ejtag_info->fast_access_save = -1;
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return ERROR_OK;
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}
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int mips_ejtag_fastdata_scan(struct mips_ejtag *ejtag_info, int write_t, uint32_t *data)
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{
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struct jtag_tap *tap;
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tap = ejtag_info->tap;
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assert(tap != NULL);
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struct scan_field fields[2];
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uint8_t spracc = 0;
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uint8_t t[4] = {0, 0, 0, 0};
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/* fastdata 1-bit register */
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fields[0].num_bits = 1;
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fields[0].out_value = &spracc;
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fields[0].in_value = NULL;
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/* processor access data register 32 bit */
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fields[1].num_bits = 32;
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fields[1].out_value = t;
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if (write_t) {
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fields[1].in_value = NULL;
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buf_set_u32(t, 0, 32, *data);
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} else
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fields[1].in_value = (void *) data;
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jtag_add_dr_scan(tap, 2, fields, TAP_IDLE);
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if (!write_t && data)
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jtag_add_callback(mips_le_to_h_u32,
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(jtag_callback_data_t) data);
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keep_alive();
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return ERROR_OK;
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}
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