e6505b0489
For historical reasons, no license information was added to the
tcl files. This makes trivial adding the SPDX tag through script:
fgrep -rL SPDX tcl/ target| while read a;do \
sed -i '1{i# SPDX-License-Identifier: GPL-2.0-or-later\n
}' $a;done
With no specific license information from the author, let's extend
the OpenOCD project license GPL-2.0-or-later to the files.
Change-Id: I7b2610300b24cccd07bfa6fb5f1266970d5d3a1b
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: https://review.openocd.org/c/openocd/+/7027
Tested-by: jenkins
79 lines
2.0 KiB
INI
79 lines
2.0 KiB
INI
# SPDX-License-Identifier: GPL-2.0-or-later
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######################################
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# Target: NXP lpc3131
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######################################
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME lpc3131
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}
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if { [info exists ENDIAN] } {
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set _ENDIAN $ENDIAN
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} else {
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set _ENDIAN little
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}
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# ARM926EJS core
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if { [info exists CPUTAPID] } {
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set _CPUTAPID $CPUTAPID
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} else {
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set _CPUTAPID 0x07926f0f
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}
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# Scan Tap
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# Wired to separate STDO pin on the lpc3131, externally muxed to TDO on ea3131 module
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# JTAGSEL pin must be 0 to activate, which reassigns arm tdo to a pass through.
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if { [info exists SJCTAPID] } {
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set _SJCTAPID $SJCTAPID
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} else {
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set _SJCTAPID 0x1541E02B
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}
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jtag newtap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
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##################################################################
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# various symbol definitions, to avoid hard-wiring addresses
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##################################################################
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global lpc313x
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set lpc313x [ dict create ]
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# Physical addresses for controllers and memory
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dict set lpc313x sram0 0x11028000
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dict set lpc313x sram1 0x11040000
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dict set lpc313x uart 0x15001000
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dict set lpc313x cgu 0x13004000
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dict set lpc313x ioconfig 0x13003000
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dict set lpc313x sysconfig 0x13002800
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dict set lpc313x wdt 0x13002400
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##################################################################
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# Target configuration
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##################################################################
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adapter srst delay 1000
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jtag_ntrst_delay 0
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME arm926ejs -endian $_ENDIAN -chain-position $_TARGETNAME
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$_TARGETNAME invoke-event halted
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$_TARGETNAME configure -work-area-phys [dict get $lpc313x sram0] -work-area-size 0x30000 -work-area-backup 0
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$_TARGETNAME configure -event reset-init {
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echo "\nRunning reset init script for LPC3131\n"
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halt
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wait_halt
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reg cpsr 0xa00000d3 ;#Supervisor mode
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reg pc 0x11029000
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poll
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sleep 500
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}
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arm7_9 fast_memory_access enable
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arm7_9 dcc_downloads enable
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