112 lines
4.4 KiB
C
112 lines
4.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/***************************************************************************
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* Copyright (C) 2011 by Martin Schmoelzer *
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* <martin.schmoelzer@student.tuwien.ac.at> *
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***************************************************************************/
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#ifndef __IO_H
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#define __IO_H
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#include "reg_ezusb.h"
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/***************************************************************************
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* JTAG Signals: *
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***************************************************************************
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* TMS ....... Test Mode Select *
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* TCK ....... Test Clock *
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* TDI ....... Test Data Input (from device point of view, not JTAG *
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* adapter point of view!) *
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* TDO ....... Test Data Output (from device point of view, not JTAG *
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* adapter point of view!) *
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* TRST ...... Test Reset: Used to reset the TAP Finite State Machine *
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* into the Test Logic Reset state *
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* RTCK ...... Return Test Clock *
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* OCDSE ..... Enable/Disable OCDS interface (Infineon specific) - shared *
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* with /JEN *
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* TRAP ...... Trap Condition (Infineon specific) - shared with TSTAT *
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* BRKIN ..... Hardware Break-In (Infineon specific) *
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* BRKOUT .... Hardware Break-Out (Infineon specific) *
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* /JEN ...... JTAG-Enable (STMicroelectronics specific) - shared *
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* with OCDSE *
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* TSTAT ..... JTAG ISP Status (STMicroelectronics specific) - shared *
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* with TRAP *
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* RESET ..... Chip Reset (STMicroelectronics specific) *
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* /TERR ..... JTAG ISP Error (STMicroelectronics specific) - shared *
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* with BRKOUT *
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***************************************************************************/
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/* PORT A */
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#define PIN_U_OE OUTA0
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/* PA1 Not Connected */
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#define PIN_OE OUTA2
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/* PA3 Not Connected */
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#define PIN_RUN_LED OUTA4
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#define PIN_TDO PINA5
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#define PIN_BRKOUT PINA6
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#define PIN_COM_LED OUTA7
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/* PORT B */
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#define PIN_TDI OUTB0
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#define PIN_TMS OUTB1
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#define PIN_TCK OUTB2
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#define PIN_TRST OUTB3
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#define PIN_BRKIN OUTB4
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#define PIN_RESET OUTB5
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#define PIN_OCDSE OUTB6
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#define PIN_TRAP PINB7
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/* JTAG Signals with direction 'OUT' on port B */
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#define MASK_PORTB_DIRECTION_OUT (PIN_TDI | PIN_TMS | PIN_TCK | PIN_TRST | PIN_BRKIN | PIN_RESET | PIN_OCDSE)
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/* PORT C */
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#define PIN_RXD0 PINC0
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#define PIN_TXD0 OUTC1
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#define PIN_RESET_2 PINC2
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/* PC3 Not Connected */
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/* PC4 Not Connected */
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#define PIN_RTCK PINC5
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#define PIN_WR OUTC6
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/* PC7 Not Connected */
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/* LED Macros */
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#define SET_RUN_LED() (OUTA &= ~PIN_RUN_LED)
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#define CLEAR_RUN_LED() (OUTA |= PIN_RUN_LED)
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#define SET_COM_LED() (OUTA &= ~PIN_COM_LED)
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#define CLEAR_COM_LED() (OUTA |= PIN_COM_LED)
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/* JTAG Pin Macros */
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#define GET_TMS() (PINSB & PIN_TMS)
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#define GET_TCK() (PINSB & PIN_TCK)
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#define GET_TDO() (PINSA & PIN_TDO)
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#define GET_BRKOUT() (PINSA & PIN_BRKOUT)
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#define GET_TRAP() (PINSB & PIN_TRAP)
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#define GET_RTCK() (PINSC & PIN_RTCK)
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#define SET_TMS_HIGH() (OUTB |= PIN_TMS)
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#define SET_TMS_LOW() (OUTB &= ~PIN_TMS)
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#define SET_TCK_HIGH() (OUTB |= PIN_TCK)
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#define SET_TCK_LOW() (OUTB &= ~PIN_TCK)
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#define SET_TDI_HIGH() (OUTB |= PIN_TDI)
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#define SET_TDI_LOW() (OUTB &= ~PIN_TDI)
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/* TRST and RESET are low-active and inverted by hardware. SET_HIGH de-asserts
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* the signal (enabling reset), SET_LOW asserts the signal (disabling reset) */
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#define SET_TRST_HIGH() (OUTB |= PIN_TRST)
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#define SET_TRST_LOW() (OUTB &= ~PIN_TRST)
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#define SET_RESET_HIGH() (OUTB |= PIN_RESET)
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#define SET_RESET_LOW() (OUTB &= ~PIN_RESET)
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#define SET_OCDSE_HIGH() (OUTB |= PIN_OCDSE)
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#define SET_OCDSE_LOW() (OUTB &= ~PIN_OCDSE)
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#define SET_BRKIN_HIGH() (OUTB |= PIN_BRKIN)
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#define SET_BRKIN_LOW() (OUTB &= ~PIN_BRKIN)
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#endif
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