db7e77237c
- Replace '\([^_]\)u32' with '\1uint32_t'. - Replace '^u32' with 'uint32_t'. git-svn-id: svn://svn.berlios.de/openocd/trunk@2278 b42882b7-edfa-0310-969c-e2dbd0fdcd60
62 lines
3.3 KiB
C
62 lines
3.3 KiB
C
/***************************************************************************
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* Copyright (C) 2005 by Dominic Rath *
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* Dominic.Rath@gmx.de *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; either version 2 of the License, or *
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* (at your option) any later version. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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* *
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* You should have received a copy of the GNU General Public License *
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* along with this program; if not, write to the *
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* Free Software Foundation, Inc., *
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* 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
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***************************************************************************/
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#ifndef ARMV4_5_MMU_H
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#define ARMV4_5_MMU_H
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#include "armv4_5_cache.h"
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#include "target.h"
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typedef struct armv4_5_mmu_common_s
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{
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uint32_t (*get_ttb)(target_t *target);
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int (*read_memory)(target_t *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
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int (*write_memory)(target_t *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
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void (*disable_mmu_caches)(target_t *target, int mmu, int d_u_cache, int i_cache);
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void (*enable_mmu_caches)(target_t *target, int mmu, int d_u_cache, int i_cache);
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armv4_5_cache_common_t armv4_5_cache;
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int has_tiny_pages;
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int mmu_enabled;
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} armv4_5_mmu_common_t;
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enum
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{
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ARMV4_5_SECTION, ARMV4_5_LARGE_PAGE, ARMV4_5_SMALL_PAGE, ARMV4_5_TINY_PAGE
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};
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extern char* armv4_5_page_type_names[];
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extern uint32_t armv4_5_mmu_translate_va(target_t *target, armv4_5_mmu_common_t *armv4_5_mmu, uint32_t va, int *type, uint32_t *cb, int *domain, uint32_t *ap);
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extern int armv4_5_mmu_read_physical(target_t *target, armv4_5_mmu_common_t *armv4_5_mmu, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
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extern int armv4_5_mmu_write_physical(target_t *target, armv4_5_mmu_common_t *armv4_5_mmu, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
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extern int armv4_5_mmu_handle_virt2phys_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, target_t *target, armv4_5_mmu_common_t *armv4_5_mmu);
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extern int armv4_5_mmu_handle_md_phys_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, target_t *target, armv4_5_mmu_common_t *armv4_5_mmu);
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extern int armv4_5_mmu_handle_mw_phys_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, target_t *target, armv4_5_mmu_common_t *armv4_5_mmu);
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enum
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{
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ARMV4_5_MMU_ENABLED = 0x1,
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ARMV4_5_ALIGNMENT_CHECK = 0x2,
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ARMV4_5_MMU_S_BIT = 0x100,
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ARMV4_5_MMU_R_BIT = 0x200
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};
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#endif /* ARMV4_5_MMU_H */
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