586 lines
17 KiB
C
586 lines
17 KiB
C
/***************************************************************************
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* Copyright (C) 2005 by Dominic Rath *
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* Dominic.Rath@gmx.de *
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* *
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* Copyright (C) 2007,2008 Øyvind Harboe *
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* oyvind.harboe@zylin.com *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; either version 2 of the License, or *
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* (at your option) any later version. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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* *
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* You should have received a copy of the GNU General Public License *
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* along with this program. If not, see <http://www.gnu.org/licenses/>. *
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***************************************************************************/
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/* 2014-12: Addition of the SWD protocol support is based on the initial work
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* by Paul Fertser and modifications by Jean-Christian de Rivaz. */
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include "bitbang.h"
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#include <jtag/interface.h>
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#include <jtag/commands.h>
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/**
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* Function bitbang_stableclocks
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* issues a number of clock cycles while staying in a stable state.
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* Because the TMS value required to stay in the RESET state is a 1, whereas
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* the TMS value required to stay in any of the other stable states is a 0,
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* this function checks the current stable state to decide on the value of TMS
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* to use.
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*/
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static int bitbang_stableclocks(int num_cycles);
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static void bitbang_swd_write_reg(uint8_t cmd, uint32_t value, uint32_t ap_delay_clk);
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struct bitbang_interface *bitbang_interface;
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/* DANGER!!!! clock absolutely *MUST* be 0 in idle or reset won't work!
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*
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* Set this to 1 and str912 reset halt will fail.
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*
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* If someone can submit a patch with an explanation it will be greatly
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* appreciated, but as far as I can tell (ØH) DCLK is generated upon
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* clk = 0 in TAP_IDLE. Good luck deducing that from the ARM documentation!
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* The ARM documentation uses the term "DCLK is asserted while in the TAP_IDLE
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* state". With hardware there is no such thing as *while* in a state. There
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* are only edges. So clk => 0 is in fact a very subtle state transition that
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* happens *while* in the TAP_IDLE state. "#&¤"#¤&"#&"#&
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*
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* For "reset halt" the last thing that happens before srst is asserted
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* is that the breakpoint is set up. If DCLK is not wiggled one last
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* time before the reset, then the breakpoint is not set up and
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* "reset halt" will fail to halt.
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*
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*/
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#define CLOCK_IDLE() 0
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/* The bitbang driver leaves the TCK 0 when in idle */
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static void bitbang_end_state(tap_state_t state)
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{
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assert(tap_is_state_stable(state));
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tap_set_end_state(state);
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}
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static int bitbang_state_move(int skip)
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{
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int i = 0, tms = 0;
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uint8_t tms_scan = tap_get_tms_path(tap_get_state(), tap_get_end_state());
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int tms_count = tap_get_tms_path_len(tap_get_state(), tap_get_end_state());
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for (i = skip; i < tms_count; i++) {
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tms = (tms_scan >> i) & 1;
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if (bitbang_interface->write(0, tms, 0) != ERROR_OK)
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return ERROR_FAIL;
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if (bitbang_interface->write(1, tms, 0) != ERROR_OK)
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return ERROR_FAIL;
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}
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if (bitbang_interface->write(CLOCK_IDLE(), tms, 0) != ERROR_OK)
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return ERROR_FAIL;
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tap_set_state(tap_get_end_state());
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return ERROR_OK;
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}
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/**
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* Clock a bunch of TMS (or SWDIO) transitions, to change the JTAG
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* (or SWD) state machine.
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*/
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static int bitbang_execute_tms(struct jtag_command *cmd)
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{
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unsigned num_bits = cmd->cmd.tms->num_bits;
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const uint8_t *bits = cmd->cmd.tms->bits;
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LOG_DEBUG_IO("TMS: %d bits", num_bits);
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int tms = 0;
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for (unsigned i = 0; i < num_bits; i++) {
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tms = ((bits[i/8] >> (i % 8)) & 1);
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if (bitbang_interface->write(0, tms, 0) != ERROR_OK)
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return ERROR_FAIL;
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if (bitbang_interface->write(1, tms, 0) != ERROR_OK)
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return ERROR_FAIL;
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}
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if (bitbang_interface->write(CLOCK_IDLE(), tms, 0) != ERROR_OK)
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return ERROR_FAIL;
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return ERROR_OK;
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}
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static int bitbang_path_move(struct pathmove_command *cmd)
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{
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int num_states = cmd->num_states;
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int state_count;
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int tms = 0;
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state_count = 0;
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while (num_states) {
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if (tap_state_transition(tap_get_state(), false) == cmd->path[state_count])
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tms = 0;
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else if (tap_state_transition(tap_get_state(), true) == cmd->path[state_count])
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tms = 1;
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else {
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LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition",
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tap_state_name(tap_get_state()),
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tap_state_name(cmd->path[state_count]));
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exit(-1);
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}
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if (bitbang_interface->write(0, tms, 0) != ERROR_OK)
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return ERROR_FAIL;
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if (bitbang_interface->write(1, tms, 0) != ERROR_OK)
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return ERROR_FAIL;
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tap_set_state(cmd->path[state_count]);
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state_count++;
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num_states--;
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}
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if (bitbang_interface->write(CLOCK_IDLE(), tms, 0) != ERROR_OK)
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return ERROR_FAIL;
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tap_set_end_state(tap_get_state());
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return ERROR_OK;
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}
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static int bitbang_runtest(int num_cycles)
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{
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int i;
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tap_state_t saved_end_state = tap_get_end_state();
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/* only do a state_move when we're not already in IDLE */
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if (tap_get_state() != TAP_IDLE) {
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bitbang_end_state(TAP_IDLE);
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if (bitbang_state_move(0) != ERROR_OK)
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return ERROR_FAIL;
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}
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/* execute num_cycles */
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for (i = 0; i < num_cycles; i++) {
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if (bitbang_interface->write(0, 0, 0) != ERROR_OK)
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return ERROR_FAIL;
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if (bitbang_interface->write(1, 0, 0) != ERROR_OK)
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return ERROR_FAIL;
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}
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if (bitbang_interface->write(CLOCK_IDLE(), 0, 0) != ERROR_OK)
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return ERROR_FAIL;
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/* finish in end_state */
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bitbang_end_state(saved_end_state);
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if (tap_get_state() != tap_get_end_state())
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if (bitbang_state_move(0) != ERROR_OK)
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return ERROR_FAIL;
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return ERROR_OK;
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}
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static int bitbang_stableclocks(int num_cycles)
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{
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int tms = (tap_get_state() == TAP_RESET ? 1 : 0);
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int i;
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/* send num_cycles clocks onto the cable */
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for (i = 0; i < num_cycles; i++) {
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if (bitbang_interface->write(1, tms, 0) != ERROR_OK)
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return ERROR_FAIL;
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if (bitbang_interface->write(0, tms, 0) != ERROR_OK)
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return ERROR_FAIL;
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}
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return ERROR_OK;
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}
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static int bitbang_scan(bool ir_scan, enum scan_type type, uint8_t *buffer,
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unsigned scan_size)
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{
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tap_state_t saved_end_state = tap_get_end_state();
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unsigned bit_cnt;
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if (!((!ir_scan &&
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(tap_get_state() == TAP_DRSHIFT)) ||
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(ir_scan && (tap_get_state() == TAP_IRSHIFT)))) {
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if (ir_scan)
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bitbang_end_state(TAP_IRSHIFT);
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else
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bitbang_end_state(TAP_DRSHIFT);
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if (bitbang_state_move(0) != ERROR_OK)
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return ERROR_FAIL;
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bitbang_end_state(saved_end_state);
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}
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size_t buffered = 0;
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for (bit_cnt = 0; bit_cnt < scan_size; bit_cnt++) {
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int tms = (bit_cnt == scan_size-1) ? 1 : 0;
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int tdi;
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int bytec = bit_cnt/8;
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int bcval = 1 << (bit_cnt % 8);
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/* if we're just reading the scan, but don't care about the output
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* default to outputting 'low', this also makes valgrind traces more readable,
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* as it removes the dependency on an uninitialised value
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*/
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tdi = 0;
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if ((type != SCAN_IN) && (buffer[bytec] & bcval))
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tdi = 1;
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if (bitbang_interface->write(0, tms, tdi) != ERROR_OK)
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return ERROR_FAIL;
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if (type != SCAN_OUT) {
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if (bitbang_interface->buf_size) {
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if (bitbang_interface->sample() != ERROR_OK)
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return ERROR_FAIL;
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buffered++;
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} else {
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switch (bitbang_interface->read()) {
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case BB_LOW:
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buffer[bytec] &= ~bcval;
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break;
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case BB_HIGH:
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buffer[bytec] |= bcval;
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break;
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default:
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return ERROR_FAIL;
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}
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}
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}
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if (bitbang_interface->write(1, tms, tdi) != ERROR_OK)
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return ERROR_FAIL;
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if (type != SCAN_OUT && bitbang_interface->buf_size &&
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(buffered == bitbang_interface->buf_size ||
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bit_cnt == scan_size - 1)) {
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for (unsigned i = bit_cnt + 1 - buffered; i <= bit_cnt; i++) {
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switch (bitbang_interface->read_sample()) {
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case BB_LOW:
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buffer[i/8] &= ~(1 << (i % 8));
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break;
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case BB_HIGH:
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buffer[i/8] |= 1 << (i % 8);
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break;
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default:
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return ERROR_FAIL;
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}
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}
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buffered = 0;
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}
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}
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if (tap_get_state() != tap_get_end_state()) {
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/* we *KNOW* the above loop transitioned out of
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* the shift state, so we skip the first state
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* and move directly to the end state.
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*/
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if (bitbang_state_move(1) != ERROR_OK)
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return ERROR_FAIL;
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}
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return ERROR_OK;
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}
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int bitbang_execute_queue(void)
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{
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struct jtag_command *cmd = jtag_command_queue; /* currently processed command */
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int scan_size;
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enum scan_type type;
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uint8_t *buffer;
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int retval;
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if (!bitbang_interface) {
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LOG_ERROR("BUG: Bitbang interface called, but not yet initialized");
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exit(-1);
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}
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/* return ERROR_OK, unless a jtag_read_buffer returns a failed check
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* that wasn't handled by a caller-provided error handler
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*/
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retval = ERROR_OK;
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if (bitbang_interface->blink) {
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if (bitbang_interface->blink(1) != ERROR_OK)
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return ERROR_FAIL;
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}
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while (cmd) {
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switch (cmd->type) {
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case JTAG_RUNTEST:
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LOG_DEBUG_IO("runtest %i cycles, end in %s",
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cmd->cmd.runtest->num_cycles,
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tap_state_name(cmd->cmd.runtest->end_state));
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bitbang_end_state(cmd->cmd.runtest->end_state);
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if (bitbang_runtest(cmd->cmd.runtest->num_cycles) != ERROR_OK)
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return ERROR_FAIL;
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break;
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case JTAG_STABLECLOCKS:
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/* this is only allowed while in a stable state. A check for a stable
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* state was done in jtag_add_clocks()
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*/
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if (bitbang_stableclocks(cmd->cmd.stableclocks->num_cycles) != ERROR_OK)
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return ERROR_FAIL;
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break;
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case JTAG_TLR_RESET:
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LOG_DEBUG_IO("statemove end in %s",
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tap_state_name(cmd->cmd.statemove->end_state));
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bitbang_end_state(cmd->cmd.statemove->end_state);
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if (bitbang_state_move(0) != ERROR_OK)
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return ERROR_FAIL;
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break;
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case JTAG_PATHMOVE:
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LOG_DEBUG_IO("pathmove: %i states, end in %s",
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cmd->cmd.pathmove->num_states,
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tap_state_name(cmd->cmd.pathmove->path[cmd->cmd.pathmove->num_states - 1]));
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if (bitbang_path_move(cmd->cmd.pathmove) != ERROR_OK)
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return ERROR_FAIL;
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break;
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case JTAG_SCAN:
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bitbang_end_state(cmd->cmd.scan->end_state);
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scan_size = jtag_build_buffer(cmd->cmd.scan, &buffer);
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LOG_DEBUG_IO("%s scan %d bits; end in %s",
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(cmd->cmd.scan->ir_scan) ? "IR" : "DR",
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scan_size,
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tap_state_name(cmd->cmd.scan->end_state));
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type = jtag_scan_type(cmd->cmd.scan);
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if (bitbang_scan(cmd->cmd.scan->ir_scan, type, buffer,
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scan_size) != ERROR_OK)
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return ERROR_FAIL;
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if (jtag_read_buffer(buffer, cmd->cmd.scan) != ERROR_OK)
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retval = ERROR_JTAG_QUEUE_FAILED;
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free(buffer);
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break;
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case JTAG_SLEEP:
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LOG_DEBUG_IO("sleep %" PRIu32, cmd->cmd.sleep->us);
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jtag_sleep(cmd->cmd.sleep->us);
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break;
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case JTAG_TMS:
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retval = bitbang_execute_tms(cmd);
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break;
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default:
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LOG_ERROR("BUG: unknown JTAG command type encountered");
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exit(-1);
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}
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cmd = cmd->next;
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}
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if (bitbang_interface->blink) {
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if (bitbang_interface->blink(0) != ERROR_OK)
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return ERROR_FAIL;
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}
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return retval;
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}
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static int queued_retval;
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static int bitbang_swd_init(void)
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{
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LOG_DEBUG("bitbang_swd_init");
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return ERROR_OK;
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}
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static void bitbang_swd_exchange(bool rnw, uint8_t buf[], unsigned int offset, unsigned int bit_cnt)
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{
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LOG_DEBUG("bitbang_swd_exchange");
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if (bitbang_interface->blink) {
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/* FIXME: we should manage errors */
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bitbang_interface->blink(1);
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}
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for (unsigned int i = offset; i < bit_cnt + offset; i++) {
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int bytec = i/8;
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int bcval = 1 << (i % 8);
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int swdio = !rnw && (buf[bytec] & bcval);
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bitbang_interface->swd_write(0, swdio);
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if (rnw && buf) {
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if (bitbang_interface->swdio_read())
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buf[bytec] |= bcval;
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else
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buf[bytec] &= ~bcval;
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}
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bitbang_interface->swd_write(1, swdio);
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}
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if (bitbang_interface->blink) {
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/* FIXME: we should manage errors */
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bitbang_interface->blink(0);
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}
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}
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static int bitbang_swd_switch_seq(enum swd_special_seq seq)
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{
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LOG_DEBUG("bitbang_swd_switch_seq");
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switch (seq) {
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case LINE_RESET:
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LOG_DEBUG("SWD line reset");
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bitbang_swd_exchange(false, (uint8_t *)swd_seq_line_reset, 0, swd_seq_line_reset_len);
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break;
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case JTAG_TO_SWD:
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LOG_DEBUG("JTAG-to-SWD");
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bitbang_swd_exchange(false, (uint8_t *)swd_seq_jtag_to_swd, 0, swd_seq_jtag_to_swd_len);
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break;
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case SWD_TO_JTAG:
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LOG_DEBUG("SWD-to-JTAG");
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bitbang_swd_exchange(false, (uint8_t *)swd_seq_swd_to_jtag, 0, swd_seq_swd_to_jtag_len);
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break;
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default:
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LOG_ERROR("Sequence %d not supported", seq);
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return ERROR_FAIL;
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}
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return ERROR_OK;
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}
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static void swd_clear_sticky_errors(void)
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{
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bitbang_swd_write_reg(swd_cmd(false, false, DP_ABORT),
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STKCMPCLR | STKERRCLR | WDERRCLR | ORUNERRCLR, 0);
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}
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static void bitbang_swd_read_reg(uint8_t cmd, uint32_t *value, uint32_t ap_delay_clk)
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{
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LOG_DEBUG("bitbang_swd_read_reg");
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assert(cmd & SWD_CMD_RnW);
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if (queued_retval != ERROR_OK) {
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LOG_DEBUG("Skip bitbang_swd_read_reg because queued_retval=%d", queued_retval);
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return;
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}
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for (;;) {
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uint8_t trn_ack_data_parity_trn[DIV_ROUND_UP(4 + 3 + 32 + 1 + 4, 8)];
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cmd |= SWD_CMD_START | (1 << 7);
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bitbang_swd_exchange(false, &cmd, 0, 8);
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bitbang_interface->swdio_drive(false);
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bitbang_swd_exchange(true, trn_ack_data_parity_trn, 0, 1 + 3 + 32 + 1 + 1);
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bitbang_interface->swdio_drive(true);
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int ack = buf_get_u32(trn_ack_data_parity_trn, 1, 3);
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uint32_t data = buf_get_u32(trn_ack_data_parity_trn, 1 + 3, 32);
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int parity = buf_get_u32(trn_ack_data_parity_trn, 1 + 3 + 32, 1);
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LOG_DEBUG("%s %s %s reg %X = %08"PRIx32,
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ack == SWD_ACK_OK ? "OK" : ack == SWD_ACK_WAIT ? "WAIT" : ack == SWD_ACK_FAULT ? "FAULT" : "JUNK",
|
|
cmd & SWD_CMD_APnDP ? "AP" : "DP",
|
|
cmd & SWD_CMD_RnW ? "read" : "write",
|
|
(cmd & SWD_CMD_A32) >> 1,
|
|
data);
|
|
|
|
switch (ack) {
|
|
case SWD_ACK_OK:
|
|
if (parity != parity_u32(data)) {
|
|
LOG_DEBUG("Wrong parity detected");
|
|
queued_retval = ERROR_FAIL;
|
|
return;
|
|
}
|
|
if (value)
|
|
*value = data;
|
|
if (cmd & SWD_CMD_APnDP)
|
|
bitbang_swd_exchange(true, NULL, 0, ap_delay_clk);
|
|
return;
|
|
case SWD_ACK_WAIT:
|
|
LOG_DEBUG("SWD_ACK_WAIT");
|
|
swd_clear_sticky_errors();
|
|
break;
|
|
case SWD_ACK_FAULT:
|
|
LOG_DEBUG("SWD_ACK_FAULT");
|
|
queued_retval = ack;
|
|
return;
|
|
default:
|
|
LOG_DEBUG("No valid acknowledge: ack=%d", ack);
|
|
queued_retval = ack;
|
|
return;
|
|
}
|
|
}
|
|
}
|
|
|
|
static void bitbang_swd_write_reg(uint8_t cmd, uint32_t value, uint32_t ap_delay_clk)
|
|
{
|
|
LOG_DEBUG("bitbang_swd_write_reg");
|
|
assert(!(cmd & SWD_CMD_RnW));
|
|
|
|
if (queued_retval != ERROR_OK) {
|
|
LOG_DEBUG("Skip bitbang_swd_write_reg because queued_retval=%d", queued_retval);
|
|
return;
|
|
}
|
|
|
|
for (;;) {
|
|
uint8_t trn_ack_data_parity_trn[DIV_ROUND_UP(4 + 3 + 32 + 1 + 4, 8)];
|
|
buf_set_u32(trn_ack_data_parity_trn, 1 + 3 + 1, 32, value);
|
|
buf_set_u32(trn_ack_data_parity_trn, 1 + 3 + 1 + 32, 1, parity_u32(value));
|
|
|
|
cmd |= SWD_CMD_START | (1 << 7);
|
|
bitbang_swd_exchange(false, &cmd, 0, 8);
|
|
|
|
bitbang_interface->swdio_drive(false);
|
|
bitbang_swd_exchange(true, trn_ack_data_parity_trn, 0, 1 + 3 + 1);
|
|
bitbang_interface->swdio_drive(true);
|
|
bitbang_swd_exchange(false, trn_ack_data_parity_trn, 1 + 3 + 1, 32 + 1);
|
|
|
|
int ack = buf_get_u32(trn_ack_data_parity_trn, 1, 3);
|
|
LOG_DEBUG("%s %s %s reg %X = %08"PRIx32,
|
|
ack == SWD_ACK_OK ? "OK" : ack == SWD_ACK_WAIT ? "WAIT" : ack == SWD_ACK_FAULT ? "FAULT" : "JUNK",
|
|
cmd & SWD_CMD_APnDP ? "AP" : "DP",
|
|
cmd & SWD_CMD_RnW ? "read" : "write",
|
|
(cmd & SWD_CMD_A32) >> 1,
|
|
buf_get_u32(trn_ack_data_parity_trn, 1 + 3 + 1, 32));
|
|
|
|
switch (ack) {
|
|
case SWD_ACK_OK:
|
|
if (cmd & SWD_CMD_APnDP)
|
|
bitbang_swd_exchange(true, NULL, 0, ap_delay_clk);
|
|
return;
|
|
case SWD_ACK_WAIT:
|
|
LOG_DEBUG("SWD_ACK_WAIT");
|
|
swd_clear_sticky_errors();
|
|
break;
|
|
case SWD_ACK_FAULT:
|
|
LOG_DEBUG("SWD_ACK_FAULT");
|
|
queued_retval = ack;
|
|
return;
|
|
default:
|
|
LOG_DEBUG("No valid acknowledge: ack=%d", ack);
|
|
queued_retval = ack;
|
|
return;
|
|
}
|
|
}
|
|
}
|
|
|
|
static int bitbang_swd_run_queue(void)
|
|
{
|
|
LOG_DEBUG("bitbang_swd_run_queue");
|
|
/* A transaction must be followed by another transaction or at least 8 idle cycles to
|
|
* ensure that data is clocked through the AP. */
|
|
bitbang_swd_exchange(true, NULL, 0, 8);
|
|
|
|
int retval = queued_retval;
|
|
queued_retval = ERROR_OK;
|
|
LOG_DEBUG("SWD queue return value: %02x", retval);
|
|
return retval;
|
|
}
|
|
|
|
const struct swd_driver bitbang_swd = {
|
|
.init = bitbang_swd_init,
|
|
.switch_seq = bitbang_swd_switch_seq,
|
|
.read_reg = bitbang_swd_read_reg,
|
|
.write_reg = bitbang_swd_write_reg,
|
|
.run = bitbang_swd_run_queue,
|
|
};
|