b3d29cb544
Allow to configure ISR masking during single-step and add handling for stepping over WFI with ISR masked. Change-Id: I7918be7bcda6a1d9badac44fc36c59b52f662fef Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/4023 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
77 lines
2.4 KiB
C
77 lines
2.4 KiB
C
/***************************************************************************
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* Copyright (C) 2015 by David Ung *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; either version 2 of the License, or *
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* (at your option) any later version. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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* *
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* You should have received a copy of the GNU General Public License *
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* along with this program; if not, write to the *
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* Free Software Foundation, Inc., *
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***************************************************************************/
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#ifndef OPENOCD_TARGET_AARCH64_H
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#define OPENOCD_TARGET_AARCH64_H
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#include "armv8.h"
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#define AARCH64_COMMON_MAGIC 0x411fc082
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#define CPUDBG_CPUID 0xD00
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#define CPUDBG_CTYPR 0xD04
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#define CPUDBG_TTYPR 0xD0C
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#define ID_AA64PFR0_EL1 0xD20
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#define ID_AA64DFR0_EL1 0xD28
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#define CPUDBG_LOCKACCESS 0xFB0
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#define CPUDBG_LOCKSTATUS 0xFB4
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#define BRP_NORMAL 0
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#define BRP_CONTEXT 1
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#define AARCH64_PADDRDBG_CPU_SHIFT 13
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enum aarch64_isrmasking_mode {
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AARCH64_ISRMASK_OFF,
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AARCH64_ISRMASK_ON,
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};
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struct aarch64_brp {
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int used;
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int type;
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target_addr_t value;
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uint32_t control;
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uint8_t BRPn;
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};
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struct aarch64_common {
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int common_magic;
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/* Context information */
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uint32_t system_control_reg;
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uint32_t system_control_reg_curr;
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/* Breakpoint register pairs */
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int brp_num_context;
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int brp_num;
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int brp_num_available;
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struct aarch64_brp *brp_list;
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struct armv8_common armv8_common;
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enum aarch64_isrmasking_mode isrmasking_mode;
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};
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static inline struct aarch64_common *
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target_to_aarch64(struct target *target)
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{
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return container_of(target->arch_info, struct aarch64_common, armv8_common.arm);
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}
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#endif /* OPENOCD_TARGET_AARCH64_H */
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