a8b1bd8376
As stated in ARM v8-A Architecture Reference Manual (ARM DDI 0487E.a)
in Chapter H4.3 DCC and ITR access modes:
Writes to EDITR trigger the instruction to be executed if the PE
is in Debug state:
- If the PE is in AArch64 state, this is an A64 instruction.
- If the PE is in AArch32 state, this is a T32 instruction
But in armv8_opcodes specifically in t32_opcodes we were using some
A32 instructions for HLT, LDRx and STRx opcodes.
Using the correct LDRx and STRx opcodes, fixes 16 and 8 bits memory access
when the PE is in AArch32 state.
Change-Id: Ib1acbdd4966297e7b069569bcb8deea3c3993615
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5346
Tested-by: jenkins
Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
95 lines
3.4 KiB
C
95 lines
3.4 KiB
C
/*
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* Copyright (C) 2015 by Matthias Welwarsky <matthias.welwarsky@sysgo.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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#include <stdint.h>
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#include <stdbool.h>
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#include "armv8.h"
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#include "armv8_opcodes.h"
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static const uint32_t a64_opcodes[ARMV8_OPC_NUM] = {
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[READ_REG_CTR] = ARMV8_MRS(SYSTEM_CTR, 0),
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[READ_REG_CLIDR] = ARMV8_MRS(SYSTEM_CLIDR, 0),
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[READ_REG_CSSELR] = ARMV8_MRS(SYSTEM_CSSELR, 0),
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[READ_REG_CCSIDR] = ARMV8_MRS(SYSTEM_CCSIDR, 0),
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[WRITE_REG_CSSELR] = ARMV8_MSR_GP(SYSTEM_CSSELR, 0),
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[READ_REG_MPIDR] = ARMV8_MRS(SYSTEM_MPIDR, 0),
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[READ_REG_DTRRX] = ARMV8_MRS(SYSTEM_DBG_DTRRX_EL0, 0),
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[WRITE_REG_DTRTX] = ARMV8_MSR_GP(SYSTEM_DBG_DTRTX_EL0, 0),
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[WRITE_REG_DSPSR] = ARMV8_MSR_DSPSR(0),
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[READ_REG_DSPSR] = ARMV8_MRS_DSPSR(0),
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[ARMV8_OPC_DSB_SY] = ARMV8_DSB_SY,
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[ARMV8_OPC_DCPS] = ARMV8_DCPS(0, 11),
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[ARMV8_OPC_DRPS] = ARMV8_DRPS,
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[ARMV8_OPC_ISB_SY] = ARMV8_ISB,
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[ARMV8_OPC_DCCISW] = ARMV8_SYS(SYSTEM_DCCISW, 0),
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[ARMV8_OPC_DCCIVAC] = ARMV8_SYS(SYSTEM_DCCIVAC, 0),
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[ARMV8_OPC_ICIVAU] = ARMV8_SYS(SYSTEM_ICIVAU, 0),
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[ARMV8_OPC_HLT] = ARMV8_HLT(11),
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[ARMV8_OPC_LDRB_IP] = ARMV8_LDRB_IP(1, 0),
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[ARMV8_OPC_LDRH_IP] = ARMV8_LDRH_IP(1, 0),
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[ARMV8_OPC_LDRW_IP] = ARMV8_LDRW_IP(1, 0),
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[ARMV8_OPC_STRB_IP] = ARMV8_STRB_IP(1, 0),
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[ARMV8_OPC_STRH_IP] = ARMV8_STRH_IP(1, 0),
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[ARMV8_OPC_STRW_IP] = ARMV8_STRW_IP(1, 0),
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};
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static const uint32_t t32_opcodes[ARMV8_OPC_NUM] = {
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[READ_REG_CTR] = ARMV4_5_MRC(15, 0, 0, 0, 0, 1),
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[READ_REG_CLIDR] = ARMV4_5_MRC(15, 1, 0, 0, 0, 1),
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[READ_REG_CSSELR] = ARMV4_5_MRC(15, 2, 0, 0, 0, 0),
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[READ_REG_CCSIDR] = ARMV4_5_MRC(15, 1, 0, 0, 0, 0),
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[WRITE_REG_CSSELR] = ARMV4_5_MCR(15, 2, 0, 0, 0, 0),
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[READ_REG_MPIDR] = ARMV4_5_MRC(15, 0, 0, 0, 0, 5),
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[READ_REG_DTRRX] = ARMV4_5_MRC(14, 0, 0, 0, 5, 0),
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[WRITE_REG_DTRTX] = ARMV4_5_MCR(14, 0, 0, 0, 5, 0),
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[WRITE_REG_DSPSR] = ARMV8_MCR_DSPSR(0),
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[READ_REG_DSPSR] = ARMV8_MRC_DSPSR(0),
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[ARMV8_OPC_DSB_SY] = ARMV8_DSB_SY_T1,
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[ARMV8_OPC_DCPS] = ARMV8_DCPS_T1(0),
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[ARMV8_OPC_DRPS] = ARMV8_ERET_T1,
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[ARMV8_OPC_ISB_SY] = ARMV8_ISB_SY_T1,
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[ARMV8_OPC_DCCISW] = ARMV4_5_MCR(15, 0, 0, 7, 14, 2),
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[ARMV8_OPC_DCCIVAC] = ARMV4_5_MCR(15, 0, 0, 7, 14, 1),
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[ARMV8_OPC_ICIVAU] = ARMV4_5_MCR(15, 0, 0, 7, 5, 1),
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[ARMV8_OPC_HLT] = ARMV8_HLT_T1(11),
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[ARMV8_OPC_LDRB_IP] = ARMV8_LDRB_IP_T3(1, 0),
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[ARMV8_OPC_LDRH_IP] = ARMV8_LDRH_IP_T3(1, 0),
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[ARMV8_OPC_LDRW_IP] = ARMV8_LDRW_IP_T3(1, 0),
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[ARMV8_OPC_STRB_IP] = ARMV8_STRB_IP_T3(1, 0),
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[ARMV8_OPC_STRH_IP] = ARMV8_STRH_IP_T3(1, 0),
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[ARMV8_OPC_STRW_IP] = ARMV8_STRW_IP_T3(1, 0),
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};
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void armv8_select_opcodes(struct armv8_common *armv8, bool state_is_aarch64)
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{
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if (state_is_aarch64)
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armv8->opcodes = &a64_opcodes[0];
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else
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armv8->opcodes = &t32_opcodes[0];
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}
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uint32_t armv8_opcode(struct armv8_common *armv8, enum armv8_opcode code)
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{
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if ((int)code >= ARMV8_OPC_NUM)
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return -1;
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return *(armv8->opcodes + code);
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}
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