5a235226f0
SWM050 is a series of MCU product by Foshan Synwit Tech, which is available in TSSOP-8 or SSOP-16 packages. Adds flash driver for the internal 8KiB flash of the MCU. The registers are based on reverse engineering the J-Flash blob provided by the vendor. Also adds a pre-made cfg file. Change-Id: I0b29f0c0d062883542ee743e0750a4c6b6609ebd Signed-off-by: Icenowy Zheng <icenowy@aosc.io> Signed-off-by: Caleb Szalacinski <contact@skiboy.net> Reviewed-on: http://openocd.zylin.com/4927 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz> Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
46 lines
1.1 KiB
INI
46 lines
1.1 KiB
INI
# Synwit SWM050
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if { [info exists CHIPNAME] } {
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set _CHIPNAME $CHIPNAME
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} else {
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set _CHIPNAME swm050
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}
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set _CHIPSERIES swm050
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if { [info exists WORKAREASIZE] } {
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set _WORKAREASIZE $WORKAREASIZE
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} else {
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set _WORKAREASIZE 0x400
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}
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if { [info exists CPUTAPID] } {
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set _CPUTAPID $CPUTAPID
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} else {
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set _CPUTAPID 0x410CC200
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}
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swd newdap $_CHIPNAME cpu -expected-id $_CPUTAPID
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dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu
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set _TARGETNAME $_CHIPNAME.cpu
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target create $_TARGETNAME cortex_m -dap $_CHIPNAME.dap
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$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE
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set _FLASHNAME $_CHIPNAME.flash
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flash bank $_FLASHNAME swm050 0x0 0x2000 0 0 $_TARGETNAME
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$_TARGETNAME configure -event reset-init {
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# Stop the watchdog, just to be safe
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mww 0x40019000 0x00
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# Set clock divider value to 1
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mww 0x400F0000 0x01
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# Set system clock to 18Mhz
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mww 0x400F0008 0x00
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}
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# SWM050 (Cortex-M0 core) supports SYSRESETREQ
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if {![using_hla]} {
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# if srst is not fitted use SYSRESETREQ to
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# perform a soft reset
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cortex_m reset_config sysresetreq
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}
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