Most Xilinx FPGA devices contain an embedded, unique device identifier. The identifier is nonvolatile, permanently programmed into the FPGA, and is unchangeable providing a great serial / tracking number. This commit adds generic support for reading the Xilinx Spartan 6 and 7 Series (Kintex, Artix, Ultrascale) Device DNA. The code is similar to the function in fpga/xilinx-xc6s.cfg for Spartan 6 but the register addresses are different and the logic has been simplified. The code was not placed in xilinx-xc7.cfg. The approach of defining taps in the same file as library code to use them is fundamentally broken on boards that have more than one FPGA or other chips. This commit (like the addition of support for Xilinx XADC) starts to remedy that by splitting library code from board-specific fixed definitions. The support code is sourced in the Kasli and KC705 board support files as it was tested on these boards. Change-Id: Iba559c7c1b7e93e1270535fd9e6650007f3794da Signed-off-by: Robert Jordens <jordens@gmail.com> Reviewed-on: http://openocd.zylin.com/4396 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
18 lines
568 B
INI
18 lines
568 B
INI
# http://www.xilinx.com/products/boards-and-kits/ek-k7-kc705-g.html
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source [find interface/ftdi/digilent-hs1.cfg]
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source [find cpld/xilinx-xc7.cfg]
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source [find cpld/jtagspi.cfg]
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source [find fpga/xilinx-xadc.cfg]
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source [find fpga/xilinx-dna.cfg]
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adapter_khz 25000
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# example command to write bitstream, soft-cpu bios and runtime:
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# openocd -f board/kc705.cfg -c "init;\
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# jtagspi_init 0 bscan_spi_xc7k325t.bit;\
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# jtagspi_program bitstream-kc705.bin 0;\
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# jtagspi_program bios.bin 0xaf0000;\
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# jtagspi_program runtime.fbi 0xb00000;\
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# xc7_program xc7.tap;\
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# exit"
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