c0f81fbee7
includes target configuration for i.MX8M SoC family, board file needs to set up CHIPNAME and CHIPCORES to match the actual hardware configuration Change-Id: Ieb6d89cab2477a58f85d0ef9cd242710950191c0 Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com> Reviewed-on: http://openocd.zylin.com/4434 Tested-by: jenkins Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
23 lines
452 B
INI
23 lines
452 B
INI
#
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# configuration file for NXP MC-IMX8M-EVK
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#
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# only JTAG supported
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transport select jtag
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# set a safe JTAG clock speed, can be overridden
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adapter_khz 1000
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# default JTAG configuration has only SRST and no TRST
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reset_config srst_only srst_push_pull
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# delay after SRST goes inactive
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adapter_nsrst_delay 70
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# board has an i.MX8MQ with 4 Cortex-A53 cores
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set CHIPNAME imx8mq
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set CHIPCORES 4
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# source SoC configuration
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source [find target/imx8m.cfg]
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